CPLL66-4160-4380
0.60" SQ SMD
MIN
TYP
MAX
UNITS
GHz
PERFORMANCE SPECIFICATION
Frequency Range:
Step Size
4.160
4.380
2500
1
3
KHz
msec
dBm
Settling Time
0
6
Output Power:
Output Phase Noise
@1KHz offset
-80
-90
-75
-85
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
@10KHz offset
@100KHz offset
-90
-85
@1MHz offset
-125
-130
Power Supply
V1=VCO Supply
V2=PLL Supply
4.75
2.7
5
3
5.25
3.3
Volts
Volts
Supply Current
I1=VCO Input Current
I2=PLL Input Current
Spurious Suppression
PFDSpur
50
25
mA
mA
-70
-80
-60
-70
dBc
dBc
Reference Feedthru
Harmonic Suppression (2nd Harmonic):
2nd
-15
-25
10
-10
-15
dBc
dBc
MHz
dBm
Ohm
Ohm
°C
3rd
Reference Frequency
RF Output Level
-5
0
5
Input Impedance
100K
50
Rf Output Impedance
Operating Temperature Range:
-40
+85
Output Phase Noise:
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