4
4.0 Registers
All RS8953B registers are read-only or write-only. For registers that contain less
than 8 bits, assigned bits reside in LSB positions; unassigned bits are ignored
during write cycles and are indeterminate during read cycles. The LSB in all
registers is bit position 0. All registers are randomly accessible except for the 64
transmit routing table entries, the 64 receive combination table entries, and the 16
receive signaling table entries which are written sequentially to a single register
address. After power-up, register initialization is required only for populated
HDSL channels. Command and status registers related to disconnected HDSL
channels can be ignored (all HDSL inputs are internally pulled high).
The single-pair version (RS8953SPBEPF and RS8953SPBEPJ) only supports
HDSL Channel 1. HDSL Channels 2 and 3 are not usable. Although only one
HDSL channel is usable, the internal registers are not changed from the three
HDSL channel versions. This means that the registers should be programmed
with the same value as if only HDSL Channel 1 was used in a three-channel
version. This allows the three-channel version to be used for development, and
without a software change, a single-pair version used for production.
N8953BDSB
Conexant
4-1
CONEXANT [ CONEXANT SYSTEMS, INC ]
