CX82100 Home Network Processor Data Sheet
8.3
8.4
UDC Core ....................................................................................................................................................................8-6
8.3.1
8.3.2
8.3.3
8.3.4
Endpoint Buffer Format................................................................................................................................8-6
Example of Endpoint Buffer Encoding..........................................................................................................8-7
Loading of the EndPtBuf Configurations......................................................................................................8-8
USB Command Handling .............................................................................................................................8-9
USB DMA Interface ...................................................................................................................................................8-10
8.4.1
8.4.2
DMA Receive Channel................................................................................................................................8-10
DMA Transmit Channel..............................................................................................................................8-12
8.5
8.6
8.7
8.8
Interrupt Endpoint.....................................................................................................................................................8-14
Summary of the Endpoints........................................................................................................................................8-14
USB Register Memory Map.......................................................................................................................................8-15
USB Registers...........................................................................................................................................................8-16
8.8.1
8.8.2
8.8.3
8.8.4
8.8.5
8.8.6
8.8.7
8.8.8
8.8.9
USB Source/Destination DMA Data Register 0 (U0_DMA: 0x00330000)....................................................8-16
USB Source/Destination DMA Data Register 1 (U1_DMA: 0x00330008)....................................................8-16
USB Source/Destination DMA Data Register 2 (U2_DMA: 0x00330010)....................................................8-16
USB Source/Destination DMA Data Register 3 (U3_DMA: 0x00330018)....................................................8-16
USB Destination DMA Data Register (UT_DMA: 0x00330020)...................................................................8-17
USB Configuration Data Register (U_CFG: 0x00330024)...........................................................................8-17
USB Interrupt Data Register (U_IDAT: 0x00330028) .................................................................................8-17
USB Control Register 1 (U_CTR1: 0x0033002C) .......................................................................................8-18
USB Control Register 2 (U_CTR2: 0x00330030)........................................................................................8-20
8.8.10 USB Control Register 3 (U_CTR3: 0x00330034)........................................................................................8-21
8.8.11 USB Status (U_STAT: 0x00330038) ..........................................................................................................8-22
8.8.12 USB Interrupt Enable Register (U_IER: 0x0033003C)................................................................................8-25
8.8.13 USB Status Register 2 (U_STAT2: 0x00330040) .......................................................................................8-26
8.8.14 USB Interrupt Enable Register 2 (U_IER2: 0x00330044) ...........................................................................8-28
8.8.15 UDC Time Stamp Register (UDC_TSR: 0x0033008C) ................................................................................8-29
8.8.16 UDC Status Register (UDC_STAT: 0x00330090)........................................................................................8-29
USB DMA Control Registers......................................................................................................................................8-30
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.9.7
8.9.8
8.9.9
EP0_IN Transmit Increment Register (EP0_IN_TX_INC: 0x00330048)......................................................8-30
EP0_IN Transmit Pending Register (EP0_IN_TX_PEND: 0x0033004C)......................................................8-30
EP0_IN Transmit qword Count Register (EP0_IN_TX_QWCNT: 0x00330050) ...........................................8-30
EP1_IN Transmit Increment Register (EP1_IN_TX_INC: 0x00330054)......................................................8-30
EP1_IN Transmit Pending Register (EP1_IN_TX_PEND: 0x00330058)......................................................8-31
EP1_IN Transmit qword Count Register (EP1_IN_TX_QWCNT).................................................................8-31
EP2_IN Transmit Increment Register (EP2_IN_TX_INC: 0x00330060)......................................................8-31
EP2_IN Transmit Pending Register (EP2_IN_TX_PEND: 0x00330064)......................................................8-31
EP2_IN Transmit qword Count Register (EP2_IN_TX_QWCNT).................................................................8-32
8.9.10 EP3_IN Transmit Increment Register (EP1_IN_TX_INC: 0x0033006C)......................................................8-32
8.9.11 EP3_IN Transmit Pending Register (EP3_IN_TX_PEND: 0x00330070)......................................................8-32
8.9.12 EP3_IN Transmit qword Count Register (EP3_IN_TX_QWCNT: 0x00330074) ...........................................8-32
8.9.13 EP_OUT Receive Decrement Register (EP_OUT_RX_DEC: 0x00330078)...................................................8-33
8.9.14 EP_OUT Receive Pending Register (EP_OUT_RX_PEND: 0x0033007C) ....................................................8-33
8.9.15 EP_OUT Receive Buffer Size Register (EP_OUT_RX_BUFSIZE: 0x00330084)............................................8-33
8.9.16 EP_OUT Receive qword Count Register (EP_OUT_RX_QWCNT: 0x00330080)..........................................8-33
8.9.17 USB Receive DMA Watchdog Timer Register (USB_RXTIMER: 0x00330094)............................................8-34
8.9.18 USB Receive DMA Watchdog Timer Counter Register (USB_RXTIMERCNT: 0x00330098)........................8-34
8.9.19 EP_OUT Receive Pending Interrupt Level Register (EP_OUT_RX_PENDLEVEL: 0x0033009C)...................8-34
8.9.20 USB Control-Status Register (U_CSR: 0x00330088) .................................................................................8-35
101306C
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