CX82100 Home Network Processor Data Sheet
8.8.10
USB Control Register 3 (U_CTR3: 0x00330034)
Bit(s)
29
Type
RW
Default
1’b0
Name
EP3O_STALL_EN
Description
Endpoint 3 OUT Stall Control.
Reset by the hardware when Endpoint 3 OUT has been stalled.
Endpoint 2 OUT Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 1 OUT Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 0 OUT Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 3 IN Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 2 IN Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 1 IN Stall Control.
Reset by the hardware when the endpoint has been stalled.
Endpoint 0 IN Stall Control.
Reset by the hardware when the endpoint has been stalled.
Interrupt Endpoint Stall Control.
Reset by the hardware when the endpoint has been stalled.
Reset for Interrupt Endpoint Retries Count.
(NAK count register)
Reset for Endpoint 3 IN Retries Count.
(NAK count register)
Reset for Endpoint 2 IN Retries Count.
(NAK count register)
Reset for Endpoint 1 IN Retries Count.
(NAK count register)
28
27
26
25
24
23
22
21
20
19
18
17
16
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
EP2O_STALL_EN
EP1O_STALL_EN
EP0O_STALL_EN
EP3I_STALL_EN
EP2I_STALL_EN
EP1I_STALL_EN
EP0I_STALL_EN
INTR_STALL_EN
RST_INTR_ERRCNT
RST_EP3I_ERRCNT
RST_EP2I_ERRCNT
RST_EP1I_ERRCNT
RST_EP0I_ERRCNT
Reset for Endpoint 0 IN Retries Count.
(NAK count register)
15
14:12
1’b0
3’b0
Reserved.
Interrupt Endpoint Retries Count.
RW
RW
RW
RW
RW
INTR_ERRCNT
EP3I_ERRCNT
EP2I_ERRCNT
EP1I_ERRCNT
EP0I_ERRCNT
11:9
8:6
5:3
2:0
3’b0
3’b0
3’b0
3’b0
Endpoint 3 IN Retries Count.
(NAK count)
Endpoint 2 IN Retries Count.
(NAK count)
Endpoint 1 IN Retries Count.
(NAK count)
Endpoint 0 IN Retries Count.
(NAK count)
101306C
Conexant Proprietary and Confidential Information
8-21