CX82100 Home Network Processor Data Sheet
7.11.7
EMAC x MII Management Interface Register (E_MII_1: 0x00310018 and E_MII_2:
0x00320018)
E_MII_1 and E_MII_2 are the EMAC MII Management Interface registers for EMAC1
and EMAC2, respectively.
Bit(s)
31:5
4
Type
Default
Name
E_MDIP
Description
Reserved.
RW
1’b0
Active Edge of EMx_MDC Pin in Input Mode.
0 = EMx_MDIO is sampled on the falling edge of EMx_MDC.
1 = EMx_MDIO is sampled on the rising edge of EMx_MDC.
Direction of Signal on EMx_MDIO Pin.
0 = EMx_MDIO pin is an output.
1 = EMx_MDIO pin is an input.
3
2
1
0
RW
RW
RO
RW
1’b1
1’b0
1’b0
1’b0
E_MM
E_MDO
E_MDI
E_MDC
Value Driven on EMx_MDIO Pin.
0 = Drive EMx_MDIO pin low when E_MM = 0 (output mode).
1 = Drive EMx_MDIO pin high when E_MM = 0 (output mode).
Value Read on EMx_MDIO Pin.
0 = EMx_MDIO pin is low when E_MM = 1 (input mode).
1 = EMx_MDIO pin is high when E_MM = 1 (input mode).
Value Driven on EMx_MDC Pin.
0 = Drive EMx_MDC pin low.
1 = Drive EMx_MDC pin high.
7-36
Conexant Proprietary and Confidential Information
101306C
CONEXANT [ CONEXANT SYSTEMS, INC ]
