CX82100 Home Network Processor Data Sheet
6. CX82100-42 supports basic functions, programmable HRDY# polarity for wireless
applications and Intoto Firewall software. Same pinout as the CX82100-41.
Recommended for new designs.
1.1
1.2
Scope
This document describes the CX82100 HNP hardware architecture.
Features
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Single-chip, high-performance processor with integrated network interfaces
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ARM940T processor
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Advanced Microcontroller Bus Architecture (AMBA) with two internal busses
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Advanced System Bus (ASB)
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Advanced Peripheral Bus (APB)
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16k x 32 internal ROM
8k x 32 internal RAM
External Memory Controller (EMC)
Two identical 10/100 Mbps IEEE 802.3 Ethernet Media Access Controllers
(EMACs) with MII/7-WS interfaces
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USB 1.1 Slave Interface
General Purpose Input/Output (GPIO) signals
Timers
Interrupt Controller (INTC)
Clock Generators
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ARM940T processor
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ARM9TDMI Core
Advanced System Bus (ASB) interface
Advanced Peripheral Bus (APB) interface
Separate 4 kB instruction and 4 kB data caches
Write-back cache scheme and write buffer optimize performance and minimize
ASB traffic
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Five-stage pipeline with fetch, decode, execute, memory and write stages
‘TrackingICE’ mode allows a conventional ICE (in-circuit emulator) mode of
operation
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Dual Media Independent Interface (MII) interface to 10/100 Ethernet PHY
Host Parallel Expansion Bus interface to Flash ROM and other devices
Parallel interface to SDRAM/SRAM
JTAG interface
22 general purpose I/O lines (13 available for application use, 6 available for
application use if optional signals for EEPROM, Host Parallel Expansion Bus, and
Clock are not used, and 3 dedicated to system signals)
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196-pin FPBGA
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Conexant Proprietary and Confidential Information
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CONEXANT [ CONEXANT SYSTEMS, INC ]
