CX28394/28395/28398
2.0 Circuit Description
Quad/x16/Octal—T1/E1/J1 Framers
2.3 System Bus
2.3 System Bus
Each framer provides high-speed, transmit and receive serial TDM interfaces.
These interfaces can be configured as non-multiplexed, individual system buses,
or they can be multiplexed internally or externally to provide 2xE1 (4096 Mbps)
and 4xE1 (8192 Mbps) buses. The system bus is compatible with the Mitel
ST-Bus, the Siemens PEB Bus, and the AT&T CHI Bus and directly connects to
other Conexant serial TDM bus devices without the need for any external
circuitry. The following five bus rates are supported:
•
•
•
•
•
1.536 MHz—T1 rate, 24 time slots, without framing bit
1.544 MHz—T1 rate with framing bit
2.048 MHz—E1 rate, 32 time slots
4.096 MHz—twice the E1 rate, 64 time slots
8.192 MHz—four times the E1 rate, 128 time slots
2.3.1 Non-Multiplexed Mode
In Non-Multiplexed mode, each framer has a separate system bus interface
consisting of the following pin functions:
Receive System Bus (RSB)
Transmit System Bus (TSB)
RSBCKI
TSBCKI
RPCMO
TPCMI
RFSYNC/RMSYNC
RINDO/RDLCKO
RSIGO/RDLO
SIGFRZ
TFSYNC/TMSYNC
TINDO/TDLCKO
TSIGI/TDLI
—
The signal available on dual function pins is controlled using register PIO
[addr 018].
To use Non-Multiplexed mode, SBIMODE[0] and/or SBIMODE[1] in the
Framer Control register [FCR; addr 080] must be zero to disable Internally
Multiplexed mode. The system bus rate is independent of the line rate and must
be selected using SBI[3:0] in the System Bus Interface Configuration register
[SBI_CR; addr 0D0]. Register bit SBI_OE [SBI_CR; addr 0D0] must also be set
to 1 to enable system bus outputs.
100054E
Conexant
2-21