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CX28395-19 参数 Datasheet PDF下载

CX28395-19图片预览
型号: CX28395-19
PDF下载: 下载PDF文件 查看货源
内容描述: 四核/ X16 /八路T1 / E1 / J1成帧器 [Quad/x16/Octal?T1/E1/J1 Framers]
分类和应用: 电信集成电路
文件页数/大小: 305 页 / 1863 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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2.0 Circuit Description  
CX28394/28395/28398  
2.2 Receiver  
Quad/x16/OctalT1/E1/J1 Framers  
2.2.5.1 Loss of Frame  
Receive Loss Of Frame (RLOF) is declared when the receive data stream does not  
meet the framing criteria specified in the Receiver Configuration register  
[RCR0; addr 040].  
If the line rate is E1 [T1/E1N; addr 001], RLOF is the logically OR'ed status  
of FAS, MFAS, and CAS alignment. These alignments, FRED, MRED and  
SRED, respectively, are available separately in the Alarm 3 Status register  
[ALM3; addr 049]. Once RLOF is declared the LOF[1:0] bits in ALM3 report the  
reason for E1 loss of frame alignment. In T1 mode, RLOF is equal to FRED.  
The RLOF real-time status is available in Alarm 1 Status register  
[ALM1; addr 047], and the interrupt status is set in the Alarm 1 Interrupt Status  
register [ISR7; addr 004]. The RLOF interrupt is enabled by setting RLOF in the  
Alarm 1 Interrupt Enable register [IER7; addr 00C].  
An FRED count [FRED[3:0]; addr 05A] is also available in the  
SEF/LOF/COFA Alarm Counter [AERR; addr 05A]. An interrupt in Counter  
Overflow Interrupt Status [ISR4; addr 007] indicates that the FRED counter  
overflowed.  
While T1 framing mode is enabled, the RLOF status and RLOF interrupt  
status are integrated over 2.0 to 2.5 seconds if the RLOF_INTEG bit is set in the  
Receive Alarm Signal Configuration register [RALM; addr 045]. The FRED  
count is unaffected by RLOF_INTEG.  
2.2.5.2 Loss of Signal  
If the line rate is T1, the criteria for Receive Loss Of Signal (RLOS) is 100  
contiguous zeros (consistent with the standard requirement of 175 ±75 zeros). If  
the line rate is E1, the criteria for RLOS is 32 contiguous zeros. RLOS is cleared  
upon detecting an average pulse density of at least 12.5% (occurring during a  
period of 175 ± 75 bits starting with the receipt of a pulse, and where no  
occurrences of 100/32 contiguous zeros are detected). The RLOS real-time status  
is available in ALM1, and the interrupt is available in ISR7. The XMTR can be  
configured to automatically generate an Alarm Indication Signal (AIS) in the  
transmit direction when RLOS is declared (see AUTO_AIS [TALM; addr 075]).  
2.2.5.3 Receive Analog  
Loss of Signal  
RALOS [ALM1; addr 047] can be configured to report loss of receive clock  
(RCKI) or loss of receive signal [RLOS; addr 047] for 1 msec depending on the  
RALOS configuration bit [RAL_CON; addr 020]. RALOS status is provided for  
compatibility with ANSI T1.431 loss of signal detection requirements; and works  
in conjunction with LIUs which detect loss of signal if the received signal level  
falls below a certain threshold and which have a signal ‘squelch’ feature. If  
RAL_CON is set for loss of signal, RALOS indicates that all zeros have been  
received for at least 1 msec (RLOS is active for 1 msec). If RAL_CON is set for  
loss of clock, RALOS becomes active (1) if the receive clock on the RCKI pin is  
not present, and inactive (0) if the clock is present.  
2.2.5.4 Alarm  
Indication Signal  
If the line rate is T1 [T1/E1N; addr 001], the criteria for Receive Alarm Indication  
Signal (RAIS) is the reception of four or fewer zeros in a period of 3 ms (4632  
bits) and assertion of RLOF. If the line rate is E1, RAIS is set if two consecutive  
double frames each contain two or fewer zeros out of 512 bits and FAS alignment  
is lost [FRED; addr 049]. The RAIS real-time status is available in ALM1. The  
RAIS interrupt is available in ISR7.  
2.2.5.5 Yellow Alarm  
The criteria for Yellow Alarm (YEL) is described in Table 3-13, Receive Yellow  
Alarm Set/Clear Criteria. YEL real-time status is available in ALM1; YEL  
interrupt is available in ISR7.  
2-8  
Conexant  
100054E  
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