4.0 Electrical/Mechanical Specifications
CX28394/28395/28398
4.4 AC Characteristics
Quad/x16/Octal—T1/E1/J1 Framers
Table 4-6. Output Data Delay Timing
Symbol
Clock
Edge
Output Data
Minimum
Maximum
Units
1
MCLK
Rising
ONESEC
INTR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
15
20
28
28
10
10
20
20
10
20
20
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(tdelay
)
TCKI or ACKI
—
—
TCKO
TDLCKO
TNRZO
MSYNCO
TPOSO
TNEGO
RDLO
Rising
TCKO
Rising
Rising
RDLCKO
RSBCKI
RPCM_NEG
(addr 0D1)
RPCMO
RSIGO
RINDO
SIGFRZ
RFSYNC
RMSYNC
TINDO
RSYN_NEG
(addr 0D1)
TSBCKI
TCKI(1)
TPCM_NEG
(addr 0D4)
TSYN_NEG
(addr 0D4)
TFSYNC
TMSYNC
0
0
10
10
ns
ns
NOTE(S):
(1)
If the TSLIP buffer is bypassed (TSB_CR; addr OD4), TCKI is used; otherwise, TSBCKI is used.
Table 4-7. One-Second Input/Output Timing
Symbol
Parameter
Minimum
Maximum
Units
1
Input Pulse Width
Output Pulse Width
1/MCLK
1 second
– 125 µs
As shown
2
125
250
µs
4-6
Conexant
100054E
CONEXANT [ CONEXANT SYSTEMS, INC ]
