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CX28395-19 参数 Datasheet PDF下载

CX28395-19图片预览
型号: CX28395-19
PDF下载: 下载PDF文件 查看货源
内容描述: 四核/ X16 /八路T1 / E1 / J1成帧器 [Quad/x16/Octal?T1/E1/J1 Framers]
分类和应用: 电信集成电路
文件页数/大小: 305 页 / 1863 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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2.0 Circuit Description  
CX28394/28395/28398  
2.4 Transmitter  
Quad/x16/OctalT1/E1/J1 Framers  
DL1 and DL2 are configured identically, except for their offset in the register  
map. The DL1 address range is 0A4 to 0AE, and the DL2 address range is 0AF to  
0B9. From this point on, the DL1 is used to describe the operation of both data  
link controllers. Transmit Data Link 1 (TDL1) can be viewed as having a higher  
priority than Transmit Data Link 2 (TDL2) because TDL1 overwrites the primary  
rate channel after TDL2. Thus, any data that TDL2 writes to the primary rate  
channel can be overwritten by TDL1, if TDL1 is configured to transmit in the  
same time slot as TDL2.  
The TDL1 is enabled using the DL1 Control register [DL1_CTL; addr 0A6].  
TDL1 will not overwrite time slot data until it is enabled. DL1_CTL also controls  
the data format and the circular buffer/FIFO mode.  
The following data formats [DL1[1,0]; addr 0A6] are supported on the data  
link: Frame Check Sequence (FCS), non-FCS, Pack8, or Pack6. FCS and  
non-FCS are HDLC-formatted messages. Pack8 and Pack6 are unformatted  
messages with 8 bits per FIFO access, and 6 bits per FIFO access, respectively.  
2.4.2.2 Circular Buffer  
The Circular Buffer/FIFO control bit [TDL1_RPT; addr 0A6] allows the FIFO to  
act as a circular buffer; in this mode, a message can be transmitted repeatedly.  
This feature is available only for unformatted transmit data link applications. The  
processor can repeatedly send fixed patterns on the selected channel by writing a  
1- to 64-byte message into the circular buffer. The programmed message length  
repeats until the processor writes a new message. The first byte of each  
unformatted message is output automatically, aligned to the first frame of a  
24-, or 16-frame transmit multiframe (SF/ESF/MFAS). This allows the processor  
to source overhead or data elements aligned to the TX timebase. In both SF and  
ESF T1 modes, unformatted messages are aligned on 24-frame boundaries.  
Therefore, in SF applications the repeating message must be designed to span two  
SF multiframes.  
Each unformatted message written is output-aligned only after the preceding  
message completes transmission. Therefore, data continuity is retained during the  
linkage of consecutive messages, provided that the contents of each message  
consists of a multiple of the multiframe length.  
2-42  
Conexant  
100054E