CX25870/871
1.0 Functional Description
Flicker-Free Video Encoder with Ultrascale Technology
1.3 Device Description
•
SLAVER bit = 1 the CX25870/871 is the video timing slave. It expects to
receive the syncs from the graphics controller. Since the CX25870 is in
slave mode, the HSYNC* and VSYNC* outputs will be three-stated and
the CX25870/871 will be set up to receive these timing signals from the
graphics controller.
•
•
•
EN_BLANKO is high (=1), signifying the CX25870/871's BLANK* port
is an output or that NO BLANK* signal is used as part of the system.
EN_DOT = 0 telling the CX25870/871 to use its internal counters to
determine the active versus the blanking regions.
EN_OUT = 0: This ensures the clock output port (CLKO) is three-stated
from the encoder.
Table 1-12. Slave Interface with a BLANK* Input to the CX25870/871
SLAVER (Bit 5
of 0xBA) ORed
with Slave Pin
EN_BLANKO
(MSb of
Register 0xC6)
EN_DOT (Bit 6
of Register
0xC6)
EN_XCLK (MSb
of Register
0xA0)
EN_OUT (LSb of
Register 0xC4)
Interfaced Used
SLAVE
1
0
1
0
1
BLANK* SIGNAL
transmitted to
theCX25870/871
and received as
an input.
•
•
•
After an autoconfiguration command, the CX25870/871 expects active
low VSYNC* and HSYNC* signals from the controller. The format of
pixels at input of encoder needs to be 24-bit RGB multiplexed unless
modifications are made to the IN_MODE[3:0] 4-bit sequence.
In addition to Table 1-11, another bit must be programmed manually with
this interface. The most significant bit of CX25870/871 register 0xA0
must be set. This guarantees that EN_XCLK will be high (=1) which will
allow the CX25870/871 to accept CLKI as the pixel clock source.
SLAVER bit = 1 so the CX25870/871 is the video timing slave. It will
expect to receive the syncs from the graphics controller. Since the
CX25870 is in slave mode, then the HSYNC* and VSYNC* outputs will
be three-stated and the CX25870/871 will be set up to receive these timing
signals from the graphics controller.
•
•
EN_BLANKO is low (= 0), signifying the CX25870/871's BLANK* port
is an input.
EN_DOT = 1, telling the CX25870/871 to use the BLANK* signal it is
receiving to determine where active video starts (rising edge of BLANK*)
and the HACTIVE register to denote where the blanking region starts.
EN_OUT = 0: This will ensure the clock output port (CLKO) is
three-stated from the encoder.
•
NOTE: Autoconfiguration Mode #28 and #29 for NTSC and PAL DVD Playback
place the encoder into slave interface where it expects a BLANK* input
(Table 1-11).
100381B
Conexant
1-25
CONEXANT [ CONEXANT SYSTEMS, INC ]
