5.0 Memory Organization
CN8478/CN8474A/CN8472A/CN8471A
5.2 Descriptors
Multichannel Synchronous Communications Controller (MUSYCC™)
Items Issued Separately
The following items are issued separately in their own interrupt descriptors:
•
Events:
– SACK
– EOP
– CHABT
– CHIC
– FREC
– SINC
– SDEC
– SFILT
•
Errors:
– PERR
– PROT
– SUERR
Items That Can Combine
In the list below, a single event can combine with a single error within the same
interrupt descriptor:
•
Events:
– EOB
– EOM
•
Errors:
– BUFF
– COFA
– ONR
– OOF
– FCS
– ALIGN
– ABT
– LNG
– SHT
The ILOST error is always piggybacked onto an existing interrupt descriptor
which can have an event, an error, or both bit fields set.
Table 5-31 lists details and descriptions of the interrupt descriptor.
Section 6.4.8 and 6.4.9 provide detailed explanations of the reasons, effects,
and recovery actions for events and errors.
Errors reported in the buffer status descriptor are also reported in the interrupt
descriptor. The occurrence in shared memory of a buffer status descriptor and the
interrupt descriptor conveying the same error condition is indeterminate. The
occurrence of an interrupt does not imply host ownership of the buffer status
descriptor. The host must always confirm ownership of the buffer status
descriptor before overwriting it.
5-40
Conexant
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CONEXANT [ CONEXANT SYSTEMS, INC ]
