CN8223
1.0 Product Description
ATM Transmitter/Receiver with UTOPIA Interface
1.10 Pin Definitions
1.10 Pin Definitions
Figure 1-12 is a pinout diagram for the 160-pin ATM Transmitter/Receiver.
Table 1-2 lists pin names and numbers. Generally, all unused input pins should be
connected to ground and unused outputs should be left unconnected. However, if
pins TXOVH_7 to TXOVH_0 or RXIN_8 to RXIN_0 are not used, they must be
tied to a logic low level. Some of the RXIN pins may be used depending on the
configuration. If PECL inputs, RXCKI_HS , RXIN_HS , or TXCKI_HS , are
not used, they must be tied to +5 V power.
Figure 1-12. CN8223 Pinout Diagram
GND
LOCD
RCV_HLD
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
VCC
D[12]
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
VCC
GND
D[0]
FCTRL_OUT[0]
FCTRL_OUT[1]
FCTRL_OUT[2]
FCTRL_OUT[3]
FCTRL_OUT[4]
FCTRL_OUT[5]
FCTRL_OUT[6]
FCTRL_OUT[7]
FCTRL_OUT[8]
GND
VCC
FCTRL_OUT[9]
FCTRL_OUT[10]
FCTRL_OUT[11]
FCTRL_OUT[12]
FCTRL_OUT[13]
FCTRL_OUT[14]
FCTRL_OUT[15]
FCTRL_OUT[16]
FDAT_OUT[0]
FDAT_OUT[1]
FDAT_OUT[2]
GND
STAT_INT
DL_INT
8KCKI
ATM
ONESECI
ONESECO
NTEST
TXOUT[8]
TXOUT[7]
TXOUT[6]
TOVH_CLK
VCC
Transmitter/Receiver
CN8223
VCC
FDAT_OUT[3]
FDAT_OUT[4]
FDAT_OUT[5]
FDAT_OUT[6]
FDAT_OUT[7]
FDAT_OUT[8]
RXIN[7]
RXIN[8]
RXOVH[0]
RXOVH[1]
RXOVH[2]
GND
TMRKR
TXOVH[7]
TXOVH[6]
TXOVH[5]
TXOVH[4]
TXOVH[3]
TXOVH[2]
TXOVH[1]
TXOVH[0]
TXOUT[5]
TXOUT[4]
GND
RXOVH[3]
VCC
100046C
Conexant
1-19
CONEXANT [ CONEXANT SYSTEMS, INC ]
