1.0 Product Description
CN8223
1.8 CN8223 Applications
ATM Transmitter/Receiver with UTOPIA Interface
Figure 1-10 illustrates an example implementation of the CN8223 using a
TDK 78P7200 T3 LIU. Unused pins on the CN8223 must be tied as follows:
unused RXIN_8:0 pins tie to ground, PECL inputs RXCKI_HS , RXIN_HS ,
and TXCKI_HS tie to +5 V.
Figure 1-10. CN8223 Connected to TDK 78P7200
CN8223
Signal
TDK 78P7200
Pin
Pin
31
35
34
TCLKO
TXOUT[2]
TXOUT[1]
TCLK
TNEG
TPOS
RCLK
27
15
14
23
Tx
Rx
Cells
RXCKI
10
17
16
19
30
ATM
Layer
RXIN[2]
RXIN[1]
RXIN[4]
RNEG
24
25
27
RPOS
LOWSIG
TXCKI
System Clock
(44.736 MHz)
1.8.1 CN8223 as a DS3 or E3 G.751 Framer without ATM Cell Delineation
The CN8223 can be used as a DS3 or an E3 G.751 framer with parallel input and
serial output by making the following changes:
•
•
•
Set the configuration registers for transparent operation.
Disable the parallel interface.
Disable line loopback.
In this setup, the receive frame sync pulse is on pin 43, TXOUT[5]. Data is
received on pin 56, TXOUT[6]. The receive clock is derived from the LIU device.
Data is transmitted through the parallel UTOPIA interface.
1-16
Conexant
100046C
CONEXANT [ CONEXANT SYSTEMS, INC ]
