3.0 Digital Processing and Functionality
3.2 Effects
Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
3.2.13 Output Filtering and SINX/X Compensation
The DAC output response is a typical sinx/x response. For the composite video
output, this results in slightly lower than desired burst and chroma amplitude
values. To compensate for this, choose an output filter with high frequency
peaking or program the BST_AMP, M_CR, and M_CB registers higher by a
factor of (x/sinx). The amplitude of the affected signal is calculated by:
fsc
-------
sin π
fclk
----------------------------
Amplitude =
fsc
-------
π
fclk
3.2.14 Low Power Features
The Bt860/Bt861 has several power saving features, including 3.3 V operation,
individual DAC disable, sleep mode, and PLL disable.
The Bt860/861 is a 3.3 V part with 5 V-tolerant digital inputs; 5 V tolerance is
obtained by setting the VDDMAX pin to 5 V. If 5 V tolerance is not required,
connect VDDMAX to VDD.
Setting the SLEEP (1B[0]) register bit to 1 puts the part into sleep mode, in
which all blocks are disabled except core serial programming functionality and
the PLL. If CLKIN is the internal clock source, power can be further reduced by
disabling the PLL and oscillator circuitry by setting the DIS_PLL (1D[4]) and
DIS_XTAL (1D[7]) register bit to 1. In sleep mode, only the SLEEP bit is active,
so the PLL must be powered down before sleep is induced if disabling the PLL is
desired. This mode achieves the greatest reduction in power.
All DACs can be disabled individually using the EN_DAC_x (18[5:0])
register bits. This method can be used when not all DACs are required
simultaneously.
3-24
Conexant
D860DSA
CONEXANT [ CONEXANT SYSTEMS, INC ]
