2.0 Inputs and Timing
Bt860/861
2.3 Configurations and Timing
Multiport YCrCb to NTSC/PAL /SECAM
The HBLANK register sets the line blanking time from the midpoint of the
falling edge of the analog horizontal sync pulse to the end of blanking. The
HACTIVE register sets the number of active pixels after the horizontal blanking
period has ended. See Tables 3-1 through 3-4 for appropriate HBLANK and
HACTIVE programming values for various NTSC, PAL, and SECAM video
standards.
Pixel and data timing (P, OSD, ALPHA, HSYNC*, VSYNC*, BLANK*) are
by default, latched into the Bt860/861 on the rising edge of the system clock, but
can be latched on the falling edge of the system clock if register bit PCLK_EDGE
(19[1]) is set high. The system clock can be seen on CLKO or CLKIN when
appropriate. Legal setup and hold times must be observed.
2.3.2 ITU-R BT.656 Timing
Data on the P port can be routed through the part’s ITU-R BT.656 timing
translator only when the system clock is 27 MHz, by setting register bit
EN_656 (1A[2]) high. This is accomplished using timing modes 3 or 4 (see
Table 2-2). Figure 2-6 illustrates an example connection diagram. ITU-R BT.656
timing derives vertical and horizontal timing information from the video data
stream (SAV and EAV codes). These codes are internally converted to HSYNC*
and VSYNC* signals, which can be then be produced on the Bt860/861’s
HSYNC*, VSYNC*, and FIELD pins. ITU-R BT.656 timing (also known as D1
timing) is illustrated in Figures 2-7 and 2-8. The resultant video is automatically
aligned to conform to ITU-R BT.656 video and blanking placement. The contents
of the HBLANK, HACTIVE, VACTIVE, and VBLANK registers are ignored,
except when register bit BLK_IGNORE = 1.
Figure 2-6. Timing Mode 3 and 4 Connection Example
CCIR656 Timing, Video Master
Bt860/861
8
P[7:0]
(1)
CLKIN
OSD Source, Timing Slave
8
2
OSD[7:0]
HSYNC*
VSYNC*
FIELD
ALPHA[1:0]
NOTE(S):
(1)
It is not required that the clock is sourced external to the Bt860/861.
861_010
2-10
Conexant
D860DSA
CONEXANT [ CONEXANT SYSTEMS, INC ]
