Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.17 System Bus Registers
RSBI[1:0]
Receive Slip Buffer Interface mode—Selects configuration of RSLIP buffer. RSBI determines
total buffer depth and initial delay conditions. While RSLIP is bypassed, RCKO clocks RSB
outputs and RSBCKI is ignored. RFSYNC and RMSYNC are also ignored in Bypass mode if
they are programmed as inputs. RFSYNC and RMSYNC must be programmed as outputs if
RSB [1:0] selects either bypass or Elastic buffer mode.
RSBI
00
Mode
Total Depth
2 Frame
Initial Delay
1 Frame
Conditions
Normal
When RFSYNC is output
When RFSYNC is input
Reverts to normal upon slip
Recenters automatically upon slip
RSBCKI ignored
0.5 to 1.5 Frames
32 Bits
01
10
11
Short
Elastic
Bypass
2 Frame
64 Bits
0 Bits
32 Bits
0 Bits
NOTE(S): To guarantee the pointer in the slip buffer is initialized properly during Elastic Mode, the
following procedure can be applied:
1. Disable slip buffer
2. Center slip buffer
3. Set the slip buffer to Elastic Mode.
RSBI[1:0] = 11, RSB_CTR = 0
RSBI[1:0] = 11, RSB_CTR = 0
RSBI[1:0] = 10, RSB_CTR = 0
0D2—RSB Sync Bit Offset (RSYNC_BIT)
7
6
5
4
3
2
1
0
—
—
—
—
—
OFFSET[2]
OFFSET[1]
OFFSET[0]
OFFSET[2:0]
RSB Sync Bit Offset—Selects which RSB bit number coincides with RFSYNC and RMSYNC
sync pulses. Sync pulses are programmed to align to 1 bit in relation to RPCMO, RSIGO,
RINDO, and SIGFRZ time slots. If the sync pulses are desired to coincide with location of T1
F-bit or time slot 0 Bit 1, OFFSET is programmed to equal 0. Sync bit offset is added to time
slot offset [RSYNC_TS; addr 0D3] to form a 10-bit OFFSET value that applies to RFSYNC
location, which is then added to frame offset [RSYNC_FRM; addr 0D8]. This forms a 15-bit
OFFSET value that applies to the RMSYNC location. Both RFSYNC and RMSYNC offsets
are expressed as RSB.OFFSET, allowing the system to generate or accept sync pulses at any
bit location within the RSB multiframe.
OFFSET[2:0]
RSYNC Location
000
001
|
Bit 1 or F-bit
Bit 2
|
110
111
Bit 7
Bit 8
N8370DSE
Conexant
3-115