Bt8370/8375/8376
3.0 Registers
Fully Integrated T1/E1 Framer and Line Interface
3.6 Primary Control and Status Registers
019—Programmable Output Enable (POE)
7
6
5
4
3
2
1
0
—
—
TDL_OE
RDL_OE
INDY_OE
TCKO_OE
CLADO_OE
RCKO_OE
TDL_OE
TDLCKO Output Buffer Control—When enabled, TDLCKO is output according to DL3_TS
and DL3_BIT [addr 015, 016]. Note that TDL_IO [addr 018] overrides TDL_OE when
TNEGI/TDLCKO pin is configured as an input.
0 = TDLCKO output enabled
1 = TDLCKO output three-stated
RDL_OE
INDY_OE
RNEGO/RDLCKO and RPOSO/RDLO Output Buffer Control—When enabled, both
bi-modal signals are output by their respective internal circuits; otherwise, both outputs are
placed in high impedance state.
0 = RNEGO/RDLCKO and RPOSO/RDLO outputs enabled
1 = RNEGO/RDLCKO and RPOSO/RDLO outputs three-stated
TNEGO/RINDO and TPOSO/TINDO Output Buffer Control—When enabled, both bi-modal
signals are output by their respective internal circuits; otherwise, both outputs are forced into
high impedance state.
0 = TNEGO/RINDO and TPOSO/TINDO outputs enabled
1 = TNEGO/RINDO and TPOSO/TINDO outputs three-stated
TCKO_OE
TCKO Output Buffer Control—Allows the system to connect multiple devices to a common
clock bus by providing programmable three-state control over the TCKO output buffer.
0 = TCKO output enabled
1 = TCKO output three-stated
CLADO_OE
CLADO Output Buffer Control—Allows the system to connect multiple devices to a common
clock bus by providing programmable three-state control over the CLADO output buffer. On
the Bt8376 device, enabling the CLADO output forces a low on the CLADO pin.
0 = CLADO output enabled
1 = CLADO output three-stated
RCKO_OE
RCKO Output Buffer Control—Allows the system to connect multiple devices to a common
clock bus by providing programmable three-state control over the RCKO output buffer.
0 = RCKO output enabled
1 = RCKO output three-stated
N8370DSE
Conexant
3-35