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BT8375EPF 参数 Datasheet PDF下载

BT8375EPF图片预览
型号: BT8375EPF
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片收发器T1 / E1和综合业务数字网( ISDN )基本速率接口 [single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces]
分类和应用: 电信集成电路综合业务数字网
文件页数/大小: 323 页 / 1950 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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Bt8370/8375/8376  
3.0 Registers  
Fully Integrated T1/E1 Framer and Line Interface  
3.6 Primary Control and Status Registers  
TS[4:0]  
External Data LinkTime Slot SelectPicks 1 8-bit time slot for input and output over the  
external data link pins. Any time slot can be chosen from TS0 to TS31 in E1 mode or TS1 to  
TS24 in T1 mode. In T1 mode, TS25 selects F-bits instead of a channel time slot.  
00000  
00001  
|
Time slot 0  
Time slot 1  
|
11110  
11111  
Time slot 30  
Time slot 31  
016External Data Link Bit (DL3_BIT)  
7
6
5
4
3
2
1
0
DL3_BIT[7]  
DL3_BIT[6]  
DL3_BIT[5]  
DL3_BIT[4]  
DL3_BIT[3]  
DL3_BIT[2]  
DL3_BIT[1]  
DL3_BIT[0]  
DL3_BIT[7:0]  
External Data Link Bit SelectEnables receive (RDLCKO) and transmit (TDLCKO) clock  
pulse outputs during selected time slot bits. DL3_BIT works in conjunction with the DL3_TS  
register [addr 015] to select any combination of bits for input and output on the external data  
link pins by writing the corresponding DL3_BIT active (high). LSB enables clock pulses  
coincident with the first bit transmitted or received. The full T1/E1 data stream is output on  
RDLO as long as the RDL_IO bit [addr 018] is active, regardless of which bits are  
accompanied by RDLCKO clock pulses. The selected transmit data link bits are sampled from  
the TDLI pin on the falling edge of TDLCKO to replace normal transmitted data. DL3_BIT  
must be set to 0x01 when DL3_TS selects T1 F-bits.  
0 = disable DL3 bit  
1 = enable DL3 bit  
017Offline Framer Status (FSTAT)  
Bt8370/8375/8376 contains a single offline framer that serves as a shared resource for both receive and transmit  
channels. Because current alignment status for receive and transmit channels is reported separately in Alarm  
Status registers (ALM1, ALM2; addr 047, 048), FSTAT is used primarily for diagnostic purposes to monitor the  
progress of an alignment search, or to verify acknowledgment of a processor-generated forced reframe request.  
These status bits can only be reported for a very short period of time (i.e., 1 clock cycle), because the RLOF and  
TLOF reframe requests can immediately request another offline framer search.  
7
6
5
4
3
2
1
0
INVALID  
FOUND  
TIMEOUT  
ACTIVE  
RX/TXN  
INVALID  
No CandidateActive-high at the conclusion of a search during which no frame alignment  
candidates were located.  
0 = search active, aborted, timed out, or found  
1 = alignment not found (no candidate).  
N8370DSE  
Conexant  
3-29  
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