Digitally Controlled Analog I/O Processor
5
MX839 PRELIMINARY INFORMATION
3 External Components
XTAL
X1
R1
XTAL/CLOCK
C2
C1
C-BUS
INTERFACE
XTAL
XTAL/CLOCK
SERIAL CLOCK
COMMAND DATA
REPLY DATA
CS
IRQ
ADCIN1
ADCIN2
ADCIN3
ADCIN4
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
MX839
R2
24
23
22
21
20
19
18
17
16
15
14
13
DV
DD
MOD2 OUT
MOD1 OUT
MOD2 IN
MOD1 IN
AV
DD
N/C
DACOUT3
DACOUT2
DACOUT1
N/C
V
BIAS
DV
DD
C5
R3
AV
DD
C4
C6
DV
DD
C3
Figure 2: Recommended External Components
R1
R2
R3
C1
C2
C3
Note 1
1M:
22k:
10:
22pF
22pF
0.1µF
±5%
±10%
±10%
±20%
±20%
±20%
X1
Note 2, 3
±100ppm
C4
C5
C6
Note 1
Note 1
0.1µF
0.1µF
10.0µF
±20%
±20%
±20%
Table 1: Recommended External Components
Notes:
1. These values should be determined in regard to the amount of supply filtering required for D/A outputs.
2. If an external clock is to be used, then it should be connected to Pin 2 and the components C1, C2, R1, and X1
omitted. The ADC clock frequency is derived from the crystal or external clock by means of internal programmable
dividers. See Section 6 for details of crystal or external clock frequency range.
3. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of
V
DD
, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain crystal oscillator design
assistance, consult your crystal manufacturer.
© 1998 MXxCOM Inc.
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054
Doc. # 20480164.002
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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