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MX839P 参数 Datasheet PDF下载

MX839P图片预览
型号: MX839P
PDF下载: 下载PDF文件 查看货源
内容描述: 数字控制的模拟I / O处理器 [Digitally Controlled Analog I/O Processor]
分类和应用: 模拟IC信号电路光电二极管
文件页数/大小: 20 页 / 169 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Digitally Controlled Analog I/O Processor  
4
MX839 PRELIMINARY INFORMATION  
2 Signal List  
Pin No.  
Name  
Type  
Description  
1
output The output of the on-chip oscillator inverter.  
XTAL  
2
3
XTAL/CLOCK  
SERIAL CLOCK  
input  
input  
The input to the on-chip oscillator inverter, for external Xtal circuit or clock.  
The 'C-BUS' serial clock input. This clock, produced by the µC, is used for  
transfer timing of commands and data to and from the device. See Figure 5.  
4
5
COMMAND DATA  
REPLY DATA  
input  
The 'C-BUS' serial data input from the µC. Data is loaded into this device in  
8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronized to the SERIAL  
CLOCK. See Figure 5.  
output The 'C-BUS' serial data output to the µC. The transmission of REPLY DATA  
bytes is synchronized to the SERIAL CLOCK under the control of the CS  
input.  
This tri-state output is held at high impedance when not sending data to the  
µC. See Figure 5.  
6
7
input  
The 'C-BUS' data loading control function. This input is provided by the µC.  
Data transfer sequences are initiated, completed or aborted by the CS signal.  
See Figure 5.  
CS  
output This output indicates an interrupt condition to the µC by going to a logic '0'.  
This is a 'wire-ORable' output, enabling the connection of up to 8 peripherals  
to 1 interrupt port on the µC. This pin has a low impedance pulldown to logic  
'0' when active and a high-impedance when inactive. An external pullup  
resistor is required.  
IRQ  
The conditions that cause interrupts are indicated in the IRQ FLAG register  
and are effective if not disabled.  
8
A/DIN1  
A/DIN2  
A/DIN3  
A/DIN4  
input  
input  
input  
input  
Analog to digital converter input 1 (A/D1)  
Analog to digital converter input 2 (A/D2)  
Analog to digital converter input 3 (A/D3)  
Analog to digital converter input 4 (A/D4)  
9
10  
11  
12  
V
SS  
power Negative supply (ground) for both analog and digital supplies.  
13  
V
BIAS  
output An analog bias line for the internal circuitry, held at AV /2. This pin must be  
DD  
bypassed by a capacitor mounted close to the device pins.  
No internal connection. Do not make any connection to this pin.  
output Digital to analog converter No. 1 output (DAC1)  
output Digital to analog converter No. 2 output (DAC2)  
output Digital to analog converter No. 3 output (DAC3)  
No internal connection. Do not make any connection to this pin.  
14  
15  
16  
17  
18  
19  
N/C  
DACOUT1  
DACOUT2  
DACOUT3  
N/C  
AV  
power Positive analog supply. Analog levels and voltages are dependent upon this  
supply. This pin should be bypassed to VSS by a capacitor.  
DD  
20  
21  
22  
23  
24  
MOD1 IN  
MOD2 IN  
MOD1  
input  
input  
Input to MOD1 variable attenuator.  
Input to MOD2 variable attenuator.  
output Output of MOD1 variable attenuator.  
output Output of MOD2 variable attenuator.  
MOD2  
DV  
power Positive digital supply. Digital levels and voltages are dependent upon this  
supply. This pin should be bypassed to VSS by a capacitor.  
DD  
© 1998 MXxCOM Inc.  
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054  
Doc. # 20480164.002  
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA  
All trademarks and service marks are held by their respective companies.  
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