TETRA Baseband Processor
FX980
Functions performed by the serial interface include:
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Power up or down and optional bypassing of selected blocks
Setting digital filter coefficients
Loading ramp up and ramp down increments and burst lengths for Tx
Loading and transmitting data
Loading offset correction, gain multiplier and phase adjustment registers
Enabling/disabling of output via the Rx serial interface
Vary sampling time for Rx data relative to the symbol (144kHz) clock.
Loading data into auxiliary DACs
Initiating conversions using auxiliary ADCs and reading results
Writing data to, and reading data from, the Waveform Generation SRAM
Power Ramping time step control
The three interfaces consist of the following signal pins:
SClk
Output
In/Out
Serial Clock pin. This pin is common for all three interfaces.
CmdDat
Command port Data pin. This pin is by default an input, but may be
configured as an open drain bi-directional pin.
CmdFS
CmdRdDat
CmdRdFS
RxDat
Input
Command port Frame Sync pin. This pin is used to mark the first bit in a
serial frame.
Output
Output
Output
Output
Command read port Data pin. This pin only has active data on it in
response to a read command.
Command read port Frame Sync pin. This pin is used to mark the first bit in
a serial frame.
Receive data port Data pin. This pin is only active when the Rx Data path is
active.
RxFS
Receive data port Frame Sync pin. This pin is used to mark the first bit in
a serial frame.
Note: All Frame Sync strobe signals are actually coincident with the last bit of a dataframe. See
Figures 4 and 5 for further details.
1.5.6.1 Command Interface
A serial command word consists of a 16-bit frame. Each frame is marked by an active Frame Sync
event which precedes the MSB bit. A command word can be either a control word or a transmit data
word.
MSB
R / W
LSB
0
Address
Data
15
14
8
7
Command Control Serial Word
MSB
1
LSB
0
Tx Data Address
U/D 4/1
Tx Data
15
14
10
9
8
7
Command Transmit Data Serial Word
ã 1997 Consumer Microcircuits Limited
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