Command Loading and Timing
CHIP SELECT
t
CSOFF
t
CSE
SERIAL CLOCK
t
NXT
t
CK
t
NXT
t
CSH
COMMAND DATA
7
MSB
6
5
4
3
2
1
0
LSB
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
ADDRESS/COMMAND
BYTE
FIRST DATA BYTE
LAST DATA BYTE
Inter-byte period logic level is not important.
Fig.6 “C-BUS” Timing Information
Parameter
t
CSE
t
CSH
t
CSOFF
t
NXT
t
CK
Min.
2.0
4.0
2.0
4.0
2.0
Typ.
–
–
–
–
–
Max.
–
–
–
–
–
Unit
µs
µs
µs
µs
µs
Notes
(1)
(2)
(3)
(4)
Command Data is transmitted to the peripheral MSB (bit7) first, LSB (bit0) last.
Data is clocked into the peripheral on the rising clock edge.
Loaded data instructions are acted upon at the end of each individual, loaded byte.
To allow for differing
µController
serial interface formats, the FX806A will work with either polarity Serial
Clock pulses.
Sets the Control, Mode and Volume Commands to 00
H
MSB
GENERAL RESET
LSB
7
MSB
6
5
4
3
2
1
0
TABLE 2
CONTROL COMMAND
LSB
1 DATA BYTE
7
6
5
4
3
2
1
0
TABLE 3
MSB
MODE COMMAND
LSB
1 DATA BYTE
7
6
5
4
3
2
1
0
TABLE 5
MSB
VOLUME SET
LSB
1 DATA BYTE
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
TABLE 4
MSB
LSB
2 DATA BYTES – BYTE 1 (loaded first)
BYTE 0 (loaded last)
MODULATOR LEVELS SET
Fig.7 Examples of “Command Data” Configurations
To assist in rapid setting, the “quick-reference” guide below should be used together with Figure 5.
Control
Bit 7
6
5
4
3 – 0
A/C = 10
H
Modulator Levels
Byte 1
Bit 7 – 5
4 – 0
Byte 2
7 – 5
4 –0
Audio Out (Rx) Enable
Modulator Drive Enable
Pre-Emphasis Enable
Input Select (Rx/Tx)
Input Level Set (-4dB to 10dB)
Drive Source
Deviation Limiter Enable
VOGAD Enable
De-Emphasis Enable
Signal Select
Process Gain Set (-4dB to 3dB)
A/C = 12
H
“0”
Mod 1 Attenuation
(0 to 12.4dB)
“0”
Mod 2 Attenuation
(0 to 6.2dB)
“0”
Powersave
Volume Set Attenuation
(0 to 48dB)
Mode
Bit 7
6
5
4
3
2 – 0
A/C = 11
H
Volume Set
Bit 7 – 6
5
4 – 0
A/C = 13
H
Table 6 “Quick-Reference” to Command Allocations
9
CMLMICRO [ CML MICROCIRCUITS ]
