PLMR Audio Processor
EXTERNAL INTEGRATION
COMPONENTS
Explanatory Block Diagram
VOGAD
OUT
EXTERNAL
SIGNAL/DATA
INPUTS
EXTERNAL SIGNAL MIXING
V
DD
VOGAD
IN
MIC. OUT
#M3
0dB
Gain Set By
External Components
INPUT SELECT
H.P.F.
+VE & -VE PEAKS
+VE PEAKS
MIC. IN
HI/LO-PEAK
DETECTOR
HI-PEAK
DETECTOR
0dB to -12.4dB
-24dB
to
6dB
Tx
#C0 - 3
MAIN PROCESS
OUT
#V6
V
BIAS
dB
Tx
SUM
IN
SUM
OUT
MODULATION
IN
#D(1) 0-4
MOD
1
dB
0dB
0dB
MIC. IN
#M6
ON
OFF
MIC.
OP-AMP
VOGAD
AMP
INPUT
L.P.F.
INPUT
H.P.F.
V
BIAS
+10dB to -4dB
#M0 - 2
-6dB/oct
0dB
+3dB to -4dB
0dB
#C4
#M4
Rx
INPUT
LEVEL
AMP
Rx
Tx
#C6 (ENABLE)
Rx (DEMOD) AUDIO IN
H.P.F.
0dB
TRANSMITTER
MODULATOR
DRIVES
0dB @ 1kHz
DE-EMPHASIS
DEVIATION
LIMITER
PROCESS
L.P.F.
PROCESS
GAIN
AMP
V
BIAS
MODULATION
SUMMING
AMPLIFIER
MOD
2
dB
dB
INPUT PROCESS
MAIN PROCESS
#M7
0dB to -6.2dB
6
#C5
#M3
+6dB/oct
0dB
0dB
V
BIAS
#D(0) 0-4
OUTPUT DRIVES
XTAL/CLOCK
10dB @ 1kHz
CLOCK
PROCESS
L.P.F.
PRE-EMPHASIS
XTAL
GENERATOR
#C7 (ENABLE)
#V0 - 4
0dB
V
SS
BUFFER
AMP
dB
dB
AUDIO
OUTPUT
SERIAL CLOCK
#
#
#
PROCESSED AUDIO IN
V
BIAS
V
BIAS
0dB to -48.0dB
C-BUS INTERFACE
COMMAND DATA
NOTES
# = Controlling Logic Bit
C = Control Command
M = Mode Command
CALIBRATION INPUT
D0 = Mod 2
D1 = Mod 1
V
= Volume Set
0dB Level = 308mVrms (60% Deviation)
.
AND
CONTROL LOGIC
CHIP SELECT
EXTERNAL AUDIO
PROCESS
Fig.5 PLMR Audio Processor – Facilities
CMLMICRO [ CML MICROCIRCUITS ]
