Application Information
VDD
XTAL
1
C 4
C
C
3
2
X
1
VDD
XTAL
R
2
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
V SS
Rx S/N
XTAL/CLOCK
ClkDivA
ClkDivB
Rx HOLD
RxDCacq
PLLacq
Tx CLOCK
Rx CLOCK
Rx DATA
Tx DATA
2
XTAL/CLOCK
V
SS
FX489P
Tx PS
Tx ENABLE
Rx PS
VBIAS
R 1
Tx OUT
9
R 4
Rx FEEDBACK
Rx SIGNAL IN
BT
10
11
12
R 3
Doc2
C 6
Doc1
VSS
C 5
C 8
C 1
C 7
V SS
External Components
Component
Value
Tolerance
R1
R2
R3
R4
C1
C2
C3
Note 1
1.0MΩ
Note 2
100kΩ
Note 1
33.0pF
33.0pF
±5%
C4
100nF
1.0µF
22.0pF
15.0nF
15.0nF
Note 3
±20%
±20%
±20%
±20%
±20%
±10%
±10%
±10%
±10%
±20%
±20%
C5
C6
C7
C8
X1
Fig.2 External Components
Notes
1. The RC network formed by R1 and C1 is required
between the Tx Out pin and the input to the modulator.
This network, which can form part of any d.c. level
shifting and gain adjustment circuitry, forms an
calculated parasitic (circuit) capacitances.
2. R3, R4 and C6 form the gain components for the Rx Input
signal.
R3 should be chosen as required by the signal input
level.
important part of the transmit signal filtering. The ground
connection to the capacitor C1 should be positioned to
give maximum attenuation of high-frequency noise into
the modulator.
The component values should be chosen so that the
product of the resistance (Ohms) and the capacitance
(Farads) is:
3. The FX489 can operate correctly with Xtal/Clock
frequencies as detailed in Table 1.
Operation of this device without a Xtal or Clock input
may cause device damage.
BT of 0.3 = 0.34/bit rate (bits/second)
BT of 0.5 = 0.22/bit rate (bits/second)
- with suitable values for common bit rates being:
R1
C1
8000 bits/sec BT = 0.3
4800 bits/sec BT = 0.5
9600 bits/sec BT = 0.5
91.0kΩ
100kΩ
47.0kΩ
470pF
470pF
470pF
NOTE that in all cases, the value of R1 should be not
less than 47.0kΩ and the calculated value of C1 includes
4
CMLMICRO [ CML MICROCIRCUITS ]
