Specification
Absolute Maximum Ratings
Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is
not implied.
Supply voltage
-0.3 to 7.0V
-0.3 to (VDD + 0.3V)
+/- 30mA
Input voltage at any pin (ref VSS = 0V)
Sink/source current (supply pins)
(other pins)
+/- 20mA
Total device dissipation @ TAMB 25°C
Derating
800mW Max.
10mW/°C
Operating temperature range: FX489DW/P
-40°C to +85°C
Storage temperature range:
FX489DW/P
-40°C to +85°C
Operating Limits
All device characteristics are measured under the following conditions unless otherwise specified:
VDD = 5.0V, TAMB = 25°C. Xtal/Clock Frequency = 4.096MHz. Data Rate = 8000 bits/sec.
Noise Bandwidth = Bit Rate
Characteristics
See Note
Min.
Typ.
Max.
Unit
Static Values
Supply Voltage (VDD)
Supply Current
4.5
5.0
5.5
V
Tx PS Rx PS
1
1
0
1
0
1
1
0
0
-
-
-
-
1.0
3.0
4.0
7.0
-
-
-
-
mA
mA
mA
mA
Input Logic Levels
Logic “1”
Logic “0”
3.5
-
-5.0
4.6
-
-
-
-
-
-
-
1.5
5.0
-
0.4
19200
V
V
µA
V
Logic Input Current
2
Logic “1”Output Level at IOH = -120µA
Logic “0”Output Level at IOL = 120µA
Rx, Tx Data Rate
V
4000
bits/sec
Transmit Parameters
Tx OUT, Output Impedance
Tx OUT, Level
Tx Data Delay (BT = 0.3)
(BT = 0.5)
Tx PS to Output-Stable Time
Receive Parameters
Rx Amplifier -
3
4
5
5
6
-
0.8
-
-
-
1.0
1.0
2.0
1.5
4.0
-
kΩ
V p-p
bit-periods
bit-periods
bit-periods
1.2
2.5
2.0
-
Input Impedance
Output Impedance
Voltage Gain
1.0
-
-
0.7
-
-
-
-
-
1.3
3.0
MΩ
kΩ
dB
7
10.0
50.0
1.0
-
Rx Filter Signal Input Level
Rx Time Delay
8
9
V p-p
bit-periods
On-Chip Xtal Oscillator
R IN
R OUT
10.0
5.0
-
1.0
80.0
80.0
-
-
-
MΩ
kΩ
dB
MHz
ns
15.0
Voltage Gain
15.0
–
-
-
-
5.0
-
Xtal/Clock Frequency
“High” Pulse Width
“Low” Pulse Width
10
10
-
ns
Notes
1. Not including current drawn from the FX489 pins by external circuitry. See Absolute Maximum Ratings.
2. For V in the range V to VDD.
3
For aINload of 10kΩ orSgSreater. Tx PS input at logic “0”; Tx Enable = “1”.
4. Data pattern of “1111000011110000 ..”
5. Measured between the rising edge of ‘Tx Clock’ and the centre of the corresponding bit at ‘Tx Out.’
6. Time between the falling edge of ‘Tx PS’ and the ‘Tx Out’ voltage stabilising to normal output levels.
7. For a load of 10kΩ or greater. Rx PS input at logic “0”.
8. For optimum performance, measured at the ‘Rx Feedback’ pin for a “1111000011110000 ...” pattern.
9. Measured between the centre of bit at ‘Rx Signal In’ and corresponding rising edge of the ‘Rx Clock’.
10. Timing for an external clock input to the Xtal/Clock pin.
11