Application Information
V
DD
XTAL/CLOCK
2
C
8
C
1
X
1
C
2
3
V
SS
XTAL
V
SS
R
1
V
DD
XTAL/CLOCK
XTAL
LOAD/LATCH
1
2
3
24
23
22
21
20
C
4
C
3
TONE IN
Rx AUDIO IN
Tx AUDIO IN
C
5
4
5
6
7
8
9
10
11
V
BIAS
Tx AUDIO OUT
Rx AUDIO OUT
PTL (Parallel Load)
Rx/Tx (Parallel Load)
TONE OUT
R
2
C
6
V
DD
D
5
D
4
4
5
L/LATCH
S DATA
S CLOCK
D
3
D
2
D
1
FX365C
19
18
17
16
15
14
13
D
1
6
7
8
18
17
x
x
D
0
R
3
x
x
9
10
V
SS
DECODE COMP IN
Rx TONE DECODE OUT
x
12
SERIAL LOAD
MODE
[differences]
PARALLEL LOAD
MODE
V
SS
C
7
V
SS
External Components
Component
R
1
R
2
R
3
C
1
C
2
C
3
Value
1.0MΩ
820kΩ
330kΩ
68.0pF
33pF
0.1µF
Tolerance
±10%
±10%
±10%
±20%
±20%
±20%
C
4
C
5
C
6
C
7
C
8
D
1
X
1
0.1µF
0.1µF
1.0µF
0.1µF
1.0µF
small signal type
1.0MHz
±20%
±20%
±20%
±20%
±20%
Fig.2 Recommended External Components
Input Pin Condition
Decode
Comp.
Input
Output Pin Condition
Rx Tone Rx Tone
Detect Decode
D
0
to D
5
Rx/Tx PTL
Result and/or Function
Tone
Tx Tone Tx Audio Tone
Rx Audio
Tx
Phase
Path
Decoder
Path
Enabled Reversed Enabled Enabled Enabled Notes
1
A
1
B
2
3
A
3
B
4
5
T
ONE
0
0
X
0
1
Y
ES
N
O
Y
ES
N
O
N
O
(
BIAS
)
T
ONE
0
1
X
0
1
Y
ES
Y
ES
Y
ES
N
O
N
O
(
BIAS
)
N
OTONE
0
X
X
0
1
N
O
(
BIAS
)
X
Y
ES
N
O
N
O
(
BIAS
)
1
0
0
0
1
N
O
(
O
/
C
)
X
N
O
Y
ES
Y
ES
T
ONE
T
ONE
1
1
0
0
1
N
O
(
O
/
C
)
X
N
O
Y
ES
Y
ES
T
ONE
1
X
1
1
0
N
O
(
O
/
C
)
X
N
O
Y
ES
Y
ES
N
OTONE
1
X
X
X
0
N
O
(
O
/
C
)
X
N
O
Y
ES
Y
ES
N
OTES
1
A
Normal tone transmit condition.
1
B
Tone Tx with phase reversed.
2
N
OTONE
programmed in Tx mode; tone transmit output set to V
DD
/2 -(0.7v). Tx audio path enabled.
3
A
Normal decode standby.
3
B
Normal decode standby with PTL used to enable audio.
4
Normal ‘decode of correct CTCSS tone’ condition; PTL has no effect.
5
N
OTONE
programmed in Rx mode; tone transmit output (o/c). Rx audio path enabled.
Table 1 Combinations of Input/Output Conditions
4
x = don't care
CMLMICRO [ CML MICROCIRCUITS ]
