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FX029J 参数 Datasheet PDF下载

FX029J图片预览
型号: FX029J
PDF下载: 下载PDF文件 查看货源
内容描述: [Audio Amplifier, 2 Channel(s), 1 Func, CMOS, CDIP16, DIP-16]
分类和应用: 放大器商用集成电路
文件页数/大小: 7 页 / 108 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Specification
Absolute Maximum Ratings
Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits
is not implied.
Supply voltage
-0.3 to 7.0V
Input voltage at any pin (ref. V
SS
= 0V)
-0.3 to (V
DD
+ 0.3V)
Sink/source current (supply pins)
+/- 30mA
(other pins)
+/- 20mA
Total device dissipation (DW/J) @ T
AMB
25°C
(D5) @ T
AMB
25°C
Derating
(DW/J)
(D5)
Operating temperature range:
FX029DW/D5/J
Storage temperature range:
FX029D5
FX029DW/J
800mW Max.
550mW Max.
10mW/°C
9mW/°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
Operating Characteristics
All device characteristics are measured under the following conditions unless otherwise specified:
V
DD
= 5.0V, T
AMB
= 25°C. External components as Figure 2. Audio 0dB ref. = 775mVrms
Characteristics
See Note
Min.
4.5
-
-
3.5
-
0.5
3.3
-
-
-
46.0
46.0
-
-
50.0
-
10.0
-
-
-
250
250
150
50.0
200
-
150
-
Typ.
5.0
0.10
3.0
-
-
1.0
-
1.0
0.35
60.0
48.0
48.0
2.0
-
-
10.0
-
1.0
0.35
60
-
-
-
-
-
-
-
-
Max.
5.5
-
-
-
1.5
-
-
2.0
0.5
-
-
-
-
0.4
-
-
-
2.0
0.5
-
-
-
-
-
-
0
-
2.0
Unit
V
mA
mA
V
V
MΩ
kHz
kΩ
%
dB
dB
dB
dB/step
dB
kΩ
mV
kHz
kΩ
%
dB
ns
ns
ns
ns
ns
ns
ns
MHz
Supply Voltage
Current
(All Stages Mute)
(All Stages Operating)
Digital Inputs
4
Input Logic “1”
Input Logic “0”
Digital Input Impedances
Gain Control Amplifier Stages
(Stages 1 and 2)
Bandwidth (-3dB)
1
Output Impedance
Total Harmonic Distortion
2, 5
Interstage Isolation
Gain
Attenuation
Gain/Attenuation Step Size
Step Error
Input Impedance
Input Referred Offset Voltage (V
IOS
)
Uncommitted Amplifier
(Stage 3)
Bandwidth (-3dB)
3
Output Impedance
Total Harmonic Distortion
3
Open Loop DC Gain
Timing
(See Figure 3)
Serial Clock “High” Pulse Width (t
PWH
)
Serial Clock “Low” Pulse Width (t
PWL
)
Data Set-up Time (t
DS
)
Data Hold Time (t
DH
)
Load/Latch Delay (t
LLD
)
Load/Latch Over-Time (t
LLO
)
Load/Latch Pulse Width (t
LLW
)
Serial Data Clock Frequency
Notes
1.
2.
3.
4.
5.
Gain set to maximum (+48.0dB).
Gain Set 0dB. Input Level 1.0kHz, -3.0dB (549mVrms).
Gain externally set to 10.0dB.
Serial Clock, Serial Data and Load/Latch inputs.
With a 100kΩ load on the relevant output.
5