Baseband Processor For Mixed Mode Land Mobile Radio
CMX880
1.5.2
Software Description
1.5.2.1
“C-BUS” Register Description
Summary of “C-BUS” Write Only Registers
ADDR.
Word Size
REGISTER
(hex)
(bits)
$01
$B0
$B1
$B2
$B3
$C0
$C1
$C2
$C3
$C7
$C8
$CA
$CB
$CD
$CE
$CF
RESET
ANALOGUE INPUT PATH CONFIGURATION
ANALOGUE OUTPUT PATH CONFIGURATION
RSSI THRESHOLDS
0
16
16
16
8
RSSI TIMING
POWER DOWN
TRANSMIT MODE CONTROL
RECEIVE MODE CONTROL
TX DATA
FFSK/MSK SYND
‘PROGRAMMING REGISTER’
FFSK/MSK SYNC
TX SELCALL TONE
DTMF TX AND TONE LEVEL
INTERRUPT MASK
16
16
16
16
16
16
16
16
16
16
16
RESERVED REGISTER ADDRESS
The “C-BUS” address $CF is allocated for production testing and must not be accessed in normal operation.
Summary of “C-BUS” Read Only Registers
ADDR
(hex)
$B4
Word Size
REGISTER
(bits)
8
16
RSSI MEASUREMENT DATA
RX DATA
$C5
$C6
STATUS
16
$C9
$CC
C4FM FS CROSS-CORRELATION PEAK
SUB-AUDIO AND SELCALL STATUS
16
16
Interrupt Operation
The CMX880 will issue an interrupt on the IRQN line when the IRQ bit (bit 15) of the ‘Status’ register and the
‘IRQ Mask’ bit (bit 15) are both set to ‘1’. The IRQ bit is set when the state of the interrupt flag bits in the
‘Status’ register change and the corresponding mask bit(s) in the ‘Interrupt Mask’ register is(are) set.
All interrupt flag bits in the ‘Status’ register except the ‘Programming Flag’ (bit 0) are cleared and the interrupt
request is cleared following the command/address phase of a “C-BUS” read of the flag register. The
‘Programming Flag’ bit is cleared only when it is permissible to write a new word to the ‘PROGRAMMING
REGISTER’.
ã 2001 Consumer Microcircuits Limited
41
D/880/1