Programmable Paging Tone Decoder
CMX823
Write Only Register Descriptions
GENERAL RESET (Hex address $01)
The reset command has no data attached to it. It resets the device (write) registers to zero (including the
OPERATION MODE bits of the CONTROL Register) and therefore enters Zero-Power mode. The RAM
FULL bit of the STATUS Register is reset to "0" but the contents of the two RAMs are retained. The
OPERATION MODE bits are used to clear the RAMs before writing to them, once the CMX823 has been
powered up.
CONTROL Register (Hex address $30)
This register is used to control the functions of the device as described below:
RAM SELECT
(Bit 7)
Bit 7
0
1
This bit selects one of the two RAMs for
programming or decoding.
RAM 1 selected
RAM 2 selected
In order to change the selected RAM, it is necessary to first disable tone detection, by placing the
CMX823 into NoTone state. The suggested procedure is:
i)
ii)
iii)
Enter NoTone state by setting GENERAL Rgister $33 bits 7 and 6 to ‘0’.
Select the other RAM by setting CONTROL Register $30 bit 7 as required.
Re-enable tone detection by setting GENERAL Register $33 bits 7 and 6 to their
previously held values.
This bit selects the measurement mode used for decoding.
FAST/SLOW SELECT
(Bit 6)
Bit 6
0
1
SLOW measurement mode
FAST measurement mode
©
2003 CML Microsystems Plc
9
D/823/3
CMLMICRO [ CML MICROCIRCUITS ]
