Programmable Paging Tone Decoder
CMX823
1.5
General Description
When the CMX823 detects the start of a valid tone it generates an interrupt and reports which tone was
detected. At the end of the tone it produces another interrupt and reports NOTONE detected. The host
µC should measure and interpret the tone lengths and gap lengths according to calling code
requirements. The CMX823 can decode any combination of up to 32 different tones from a list, received
in any order. This device is not designed for the decoding of multiple tones that are present
simultaneously.
The parameters for decoding each tone in the tone list are stored in a decoding RAM. Two RAMs are
available and selectable via CONTROL Register $30. Each RAM is intended for use with a single RF
channel and the RAM contents are preserved each time the RF channel is changed or when the device is
taken out of Zero-Power mode, so the host µC does not need to reload the tone definitions. Each RAM
has the ability to store up to 32 tones. Tone decode parameters can belong to either or both of 2 tone
groups, which may be used to represent the first and second tones in a tone sequence. The tone decode
parameters for the selected group are sequentially retrieved from RAM and matched with those of the
received signal to find a tone decode. If a match is found, the CMX823 generates an interrupt and reports
the decoded tone parameters. Further tone definitions in the RAM are not checked as the decoding
process is then restarted and a new tone decode match is reported. Tone decode status changes are
flagged in the STATUS Register. To ensure data validity, interrupts should be serviced within 4.3ms or
8.6ms, depending on the setting of the FAST/SLOW bit of the CONTROL register.
RAM
Location
Tone
Group
1
0
1
2
:
:
:
29
30
31
•
•
•
•
•
1
1
1
:
:
:
1
0
1
2
0
0
1
:
:
:
0
1
1
RAM FIFO 1
Tone
Frequency
N
N1
N2
N3
:
:
:
N30
N31
N32
R
R1
R2
R3
:
:
:
R30
R31
R32
1
1
1
1
:
:
:
1
0
1
Tone
Group
2
0
0
1
:
:
:
0
1
1
RAM FIFO 2
Tone
Frequency
N
N1
N2
N3
:
:
:
N30
N31
N32
R
R1
R2
R3
:
:
:
R30
R31
R32
Each of the two RAM FIFOs holds an independent list of up to 32 user-defined tones.
Each defined tone has a user-configured Tone Group assignment.
One RAM FIFO can be activated at a time. Configuration of CONTROL Register $30
determines which of the RAM FIFOs is currently active.
Configuration of the TONE DECODE MODE bits (bits 6 and 7) of GENERAL Register $33
determines whether Tone Group 1 or Tone Group 2 assigned tones of the currently active
FIFO are decoded.
RAM location 0 is reserved for programming the 1
st
tone of a 2-tone or 5/6 tone sequence. It
should not be used for programming later tones in the sequence.
©
2003 CML Microsystems Plc
7
D/823/3
CMLMICRO [ CML MICROCIRCUITS ]
