CMX7164 Multi Mode Modem
CMX7164
3
15/4/11
Remove information indicating that a reset with no FI load is possible. See
sections 11.1.1 Reset Operations, 7.3 Function image loading
FIFO level interrupts to the host require re-arming using $50 FIFO control. See
11.1.4 FIFO Control $50
Include description for "I/Q Input dc correction loop gain". See 11.1.10 Signal
control $61
Spectrum figure ACP mislabeled as for 25kHz when it is for 12.5kHz. See fig
58
Expand description of FI-2 4-FSK deviation configuration. See 11.1.10 Signal
control $61
Include over-air symbol sequence for FI-2 (2-FSK and 4-FSK) and FI-4 data.
See 7.4.15, 11.1.3 and 11.1.26. Specifically this matters for bit wise transfers,
indicating which bits are valid
Default values in 11.1.9 to be changed: $07FF becomes $0400; $0801
becomes $0C00
Addition of "Tx Done flag set on completion of DC Calibration" to 7.4.11,
11.1.18 and 11.1.36. Also indicate that AuxADC paths, etc in 7.4.11 are fixed
permanently, by changing the description "assumed" to "required"
Figure 34 to show "Main PLL out" sourced directly from the Xtal in Idle mode
Update Figure 3 and correct minor typographical errors (Fig 43)
Clarify text at the end of section 12.3.2
Change b11 to b9 in section 11.1.14
Remove FI Load Activation Block references and describe default states in
section11.1.2 and Table 5
Clarify bit names in section 11.1.20, to avoid duplication
Add missing action #20 in section 11.2.1
2
1
22/3/11
24/2/11
Original document, prepared for first alpha release of FI.
2015 CML Microsystems Plc
Page 12
D/7164_FI-1.x/FI-2.x/FI-4.x/FI-6.x/22
CMLMICRO [ CML MICROCIRCUITS ]
