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CMX7163Q1 参数 Datasheet PDF下载

CMX7163Q1图片预览
型号: CMX7163Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, VQFN-64]
分类和应用: 电信电信集成电路
文件页数/大小: 81 页 / 4386 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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CMX7163 QAM Modem  
CMX7163  
6
12/4/11  
Remove information indicating that a reset with no FI load is possible. See  
sections 10.1.1 Reset Operations, 7.3 Function image loading  
FIFO level interrupts to the host require re-arming using $50 FIFO control. See  
10.1.4 FIFO Control $50  
Include description for "I/Q Input dc correction loop gain". See 10.1.10 Signal  
control $61  
Spectrum figure ACP mislabeled as for 25kHz when it is for 12.5kHz  
Include over-air symbol sequence for FI-4 data. See 7.4.15, 10.1.3 and  
10.1.26. Specifically this matters for bit wise transfers, indicating which bits are  
valid  
Default values in 10.1.9 to be changed: $07FF becomes $0400; $0801  
becomes $0C00  
Addition of "Tx Done flag set on completion of DC Calibration" to 7.4.11,  
10.1.18 and 10.1.36. Also indicated that AuxADC paths, etc in 7.4.11 are fixed  
permanently, by changing the description "assumed" to "required"  
Figure 27 to show "Main PLL out" sourced directly from the Xtal in Idle mode  
Update Figure 3  
5
21/3/11  
Add descriptions for Program Blocks 8 and 9  
Clarify text at the end of section 11.2.2  
Change b11 to b9 in section 10.1.14  
Remove FI Load Activation Block references and describe default states in  
section10.1.2  
Clarify bit names in section 10.1.20, to avoid duplication  
Add missing action #20 in section 10.2.1  
Add details of the method of programming the lower part of the Rx I/Q dc offset  
($5F,$60)  
Simplify the detail of the system clock architecture  
Describe RRC =0.2/0.35 option  
Added programmable filter option (details on request)  
Update I/Q output reconstruction filter Capacitor values to be preferred values  
Clarified the structure of words put into the Modem Command FIFO  
Revised recommended crystal tolerance  
4
6/12/10  
Revised C-BUS clock rate  
Revised current drawn by AuxDACs  
Clarify maximum input signal levels  
Improved programming register settings determining baud rate resulting in  
improved adjacent channel performance (P1.0-P1.6).  
Improved consistency of naming of signals and registers within the document  
and when compared to other CML devices. Notably AuxADC/DAC are now  
numbered 1-4  
Added detail for new FI feature: Tx DC calibration when attached to a CMX998  
Added detail for new FI feature: Discard symbol count which allows  
modulation to begin earlier than it would otherwise.  
Many editorial changes  
Added Output dc offset lower part control to registers $5D, $5E  
Changed default GPIO and RAMDAC setup to manual  
Added Reg Done Select register ($69) and changed to description of PRG flag  
to be a type of “Reg Done”  
3
27/9/2010  
Corrections to Boot description  
Corrected several minor typographical and presentational errors.  
2014 CML Microsystems Plc  
Page 7  
D/7163_FI-4.x/12