CMX7163 QAM Modem
CMX7163
7.4.22 SPI/C-BUS AGC .................................................................................................. 46
Digital System Clock Generators................................................................................ 48
7.5.1 Main Clock Operation........................................................................................... 48
7.5.2 System Clock Operation ...................................................................................... 49
Signal Level Optimisation ........................................................................................... 50
7.6.1 Transmit Path Levels ........................................................................................... 50
7.6.2 Receive Path Levels............................................................................................. 50
C-BUS Register Summary.......................................................................................... 51
7.5
7.6
7.7
8
CMX7163 FI-4.x Features ...................................................................................................... 52
8.1
8.2
CMX7163 FI-4.x Modulation....................................................................................... 52
CMX7163 FI-4.x Radio Interface................................................................................ 53
8.2.1 Control interfaces................................................................................................. 53
CMX7163 FI-4.x Formatted Data ............................................................................... 54
Receiver Response Equaliser .................................................................................... 55
CMX7163 FI-4.x Typical Transmit Performance ........................................................ 57
CMX7163 FI-4.x Typical Receive Performance ......................................................... 62
8.6.1 Signal to Noise and Co-channel........................................................................... 62
8.6.2 Adjacent Channel................................................................................................. 66
8.6.3 Receiver Dynamic Range .................................................................................... 67
8.6.4 Receiver Response Equaliser Performance........................................................ 67
8.3
8.4
8.5
8.6
9
Performance Specification ................................................................................................... 71
9.1
Electrical Performance ............................................................................................... 71
9.1.1 Absolute Maximum Ratings ................................................................................. 71
9.1.2 Operating Limits................................................................................................... 71
9.1.3 Operating Characteristics..................................................................................... 72
9.1.4 CMX7163 FI-4.x Parametric Performance........................................................... 77
C-BUS Timing............................................................................................................. 79
Packaging................................................................................................................... 80
9.2
9.3
Table
Page
Table 1 BOOTEN Pin States......................................................................................................... 22
Table 2 C-BUS Registers.............................................................................................................. 51
Table 3 Formatted Block Types, Sizes and Rates........................................................................ 54
Table 4 ACR Rejection Performance............................................................................................ 67
Figure
Page
Figure 1 Overall Block Diagram ...................................................................................................... 9
Figure 2 FI-4.x Block Diagram – I/Q Tx and Rx............................................................................ 10
Figure 3 CMX7163 Power Supply and De-coupling...................................................................... 14
Figure 4 Recommended External Components – Xtal Interface................................................... 15
Figure 5 Recommended External Components – C-BUS Interface.............................................. 15
Figure 6 Recommended External Components – I/Q Output Reconstruction Filter ..................... 16
Figure 7 CMX7163 I/Q Tx, I/Q Rx................................................................................................. 18
Figure 8 Basic C-BUS Transactions ............................................................................................. 20
Figure 9 C-BUS Data Streaming Operation.................................................................................. 21
Figure 10 FI Loading from Host .................................................................................................... 23
2014 CML Microsystems Plc
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CMLMICRO [ CML MICROCIRCUITS ]
