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CMX7163Q1 参数 Datasheet PDF下载

CMX7163Q1图片预览
型号: CMX7163Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, VQFN-64]
分类和应用: 电信电信集成电路
文件页数/大小: 81 页 / 4386 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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CMX7163 QAM Modem  
CMX7163  
See:  
10.1.4 FIFO Control - $50 write  
10.1.28 Internal Buffer Fill Level - $70 read.  
Note: The Command FIFO and Command Buffer will automatically be flushed when a carrier sense  
attempt to transmit results in the CMX7163 reverting to receive mode. This is to avoid accidentally  
processing transmit commands pre-loaded by the host as receive commands. This is the only situation in  
which the FIFOs or buffers will be flushed other than by direct host instruction.  
7.4.15 Raw Data Transfer  
When transferring raw data the FIFO Control byte indicates the amount of data that will be transferred in a  
block before the CMX7163 interrupts the host. Byte and bit-wise transfers are possible, providing the  
facility to transmit or receive a burst of arbitrary length, not just a whole number of bytes. It is suggested  
that data is transferred in the maximum size blocks possible until the end of a burst - where the remaining  
bits, or bytes can be transferred in a single transaction of the required size.  
When using byte wise or bit wise transfers the most significant bit of the data byte is transmitted (or  
received) first. When using bit wise transfers with a bit count of less than 8 the most significant bits are  
used. In all cases the bits are combined into symbols according to the selected modulation type.  
It is also possible to ignore the concept of blocks of data whilst in raw mode. Instead, a transmission can  
just be treated as a series of bytes to transmit and FIFO levels/level IRQs used to manage the data flow.  
Likewise in receive the host can request continual data reception and the resulting bytes will be placed in  
the Rx Data FIFO. FIFO levels and level IRQs may be used to manage the data flow. This mode provides  
the ability to simply stream (using streaming C-BUS if desired) multiple bytes into or out of the CMX7163  
as FIFO content allows.  
7.4.16 Formatted Data Transfer  
When the transfer of formatted data is selected by the Modem Mode and Control - $6B write register the  
FIFO Control byte indicates the block type to use in either sending or decoding the data. The block type  
dictates the format or quantity of data transferred, including how error detection and correction bits are  
added to the over air data stream.  
7.4.17 Pre-loading Commands  
It is advisable to pre-load data into the Command FIFO before transmission begins, or to pre-load receive  
data commands into the Command FIFO prior to frame sync reception.  
7.4.18 GPIO Pin Operation  
The CMX7163 provides 4 x GPIO pins, each pin can be configured independently as automatic/manual,  
input/output and rising/falling (with the exception of the combination automatic + input function which is  
only allowed for GPIOA).  
Pins that are automatic outputs become part of a transmit sequence and will automatically switch, along  
with the RAMDAC AuxDAC1 (if it is configured as automatic) during the course of a burst. Pins that are  
manual are under direct user control. When automatic, a rising, or a falling event at the start or end of  
transmission will cause the specified GPIO to be switched high or low accordingly.  
GPIOA may be configured as an automatic input. This means that any attempted transmission will wait  
until GPIOA input is high (if rising is selected) or low (if falling is selected).  
See:  
0
P4.8: Set legacy timing mode  
2014 CML Microsystems Plc  
Page 42  
D/7163_FI-4.x/12