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CMX7163Q1 参数 Datasheet PDF下载

CMX7163Q1图片预览
型号: CMX7163Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, VQFN-64]
分类和应用: 电信电信集成电路
文件页数/大小: 81 页 / 4386 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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CMX7163 QAM Modem  
CMX7163  
read Receive FIFO Data  
Byte register  
Oldest Rx FIFO data byte is removed from FIFO and returned, Rx FIFO Word  
updated  
read Receive FIFO Data  
Word register  
Oldest Rx FIFO data word (control and data bytes) is removed from FIFO and  
returned, Rx FIFO control word updated  
C-BUS  
interface  
CMD  
Level  
Rx Level  
CMD FIFO LEVEL  
RX FIFO LEVEL  
RX FIFO CTRL  
CMD FIFO CTRL  
CMD FIFO  
WRITE16  
RX FIFO  
READ16  
CMD FIFO  
WRITE8  
RX FIFO  
READ8  
mux  
mux  
LSB  
MSB  
LSB  
MSB  
CMD  
Level  
128x16 CMD FIFO  
128x16 RX FIFO  
Rx Level  
Figure 25 Command and Rx Data FIFOs  
Raw or formatted data may be transmitted with the CMX7163 adding preamble, frame sync and tail bits.  
Raw or formatted transmission/reception is selected using the Modem Mode and Control - $6B write  
register, each whole transmission/reception must continue in the selected mode. Relevant registers are:  
10.1.18 Modem Mode and Control - $6B write  
10.1.3 Modem Command FIFO Data/Control - $48, $49 and $4A write  
10.1.26 Receive FIFO Data/Control - $4C, $4D, $4E read  
10.1.25 Modem Command FIFO Level - $4B read  
10.1.27 Receive FIFO Level - $4F read  
10.1.4 FIFO Control - $50 write.  
Note: The Command FIFO and Command Buffer will automatically be flushed when a carrier sense  
attempt to transmit results in the CMX7163 reverting to receive mode. This is to avoid accidentally  
processing transmit commands pre-loaded by the host as receive commands. This is the only situation in  
which the FIFOs or buffers will be flushed other than by direct host instruction.  
7.4.14 Data Buffering  
To expand the buffering capabilities of the CMX7163 two internal buffers are provided:  
A Command buffer which buffers commands from the control FIFO which are yet to be processed.  
An Rx data buffer which buffers received data yet to be loaded into the Rx data FIFO.  
Transfer between the FIFOs and their respective buffers will occur during transmission, reception and Idle  
mode. Such transfer is not instantaneous so the FIFO fill levels should be used to indicate how much data  
the host may read or write at any time.  
The Internal Buffer Fill Level - $70 read register allows the buffer fill levels to be read; their contents will be  
flushed when the respective FIFO is flushed.  
2014 CML Microsystems Plc  
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