CMX7163 QAM Modem
CMX7163
To increase the data bandwidth between the µC and the CMX7163, certain of the C-BUS read and write
registers are capable of data-streaming operation. This allows a single address byte to be followed by the
transfer of multiple read or write data words, all within the same C-BUS transaction. This can significantly
increase the transfer rate of large data blocks, as shown in Figure 9.
Example of C-BUS data-streaming (8-bit write register)
CSN
SCLK
CDATA
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Address First byte Second byte
7 6 5 4 3 2 1 0
Last byte
…
Hi-Z
RDATA
Example of C-BUS data-streaming (8-bit read register)
CSN
SCLK
CDATA
7 6 5 4 3 2 1 0
Address
Hi-Z
RDATA
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
First byte Second byte
7 6 5 4 3 2 1 0
Last byte
…
Data value unimportant
Repeated cycles
Either logic level valid (and may change)
Either logic level valid (but must not change from low to high)
Figure 9 C-BUS Data Streaming Operation
Notes:
1. For Command byte transfers only the first 8 bits are transferred ($01 = Reset)
2. For single byte data transfers only the first 8 bits of the data are transferred
3. The CDATA and RDATA lines are never active at the same time. The address byte determines
the data direction for each C-BUS transfer.
4. The SCLK can be high or low at the start and end of each C-BUS transaction
5. The gaps shown between each byte on the CDATA and RDATA lines in the above diagram are
optional, the host may insert gaps or concatenate the data as required.
2014 CML Microsystems Plc
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