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CMX7141L4 参数 Datasheet PDF下载

CMX7141L4图片预览
型号: CMX7141L4
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 4MHz, CMOS, PQFP48, LQFP-48]
分类和应用: 时钟外围集成电路
文件页数/大小: 74 页 / 4034 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Digital PMR Radio Processor
CMX7131/CMX7141
CMX7131
64-pin
Q1/L9
27
28
29
30
31
32
CMX7141
48-pin
Q3/L4
19
20
21
22
23
24
Pin
Name
ALTFB
MICFB
MIC
AVSS
MOD1
MOD2
Type
OP
OP
IP
PWR
OP
OP
Description
Alternate input amplifier feedback
Microphone input amplifier feedback
Microphone inverting input
Analogue ground
Modulator 1 output
Modulator 2 output
Internally generated bias voltage of about AV
DD
/2, except
when the device is in ‘Powersave’ mode when V
BIAS
will
discharge to AV
SS
. Must be decoupled to AV
SS
by a
capacitor mounted close to the device pins. No other
connections allowed.
Audio Output in SPI-Codec mode
Auxiliary ADC input 1
Auxiliary ADC input 2
Auxiliary ADC input 3
Auxiliary ADC input 4
Each of the two ADC blocks
can select its input signal
from any one of these input
pins, or from the MIC, ALT or
DISC input pins. See section
8.1.3 for details.
33
25
VBIAS
OP
34
35
36
37
38
26
27
28
29
30
AUDIO
ADC1
ADC2
ADC3
ADC4
OP
IP
IP
IP
IP
39
31
AVDD
PWR
Analogue +3.3V supply rail. Levels and thresholds within the
device are proportional to this voltage. This pin should be
decoupled to AV
SS
by capacitors mounted close to the
device pins.
Auxiliary DAC output 1/RAMDAC
Auxiliary DAC output 2
Analogue ground
Auxiliary DAC output 3
Auxiliary DAC output 4
Digital ground
Internally generated 2.5V supply voltage. Must be decoupled
to DV
SS
by capacitors mounted close to the device pins. No
other connections allowed, except for the optional connection
to RFV
DD
.
Input from the external clock source or Xtal
The output of the on-chip Xtal oscillator inverter.
NC if external clock used.
Digital +3.3V supply rail. This pin should be decoupled to
DV
SS
by capacitors mounted close to the device pins.
C-BUS Command Data: Serial data input from the µC
40
41
42
43
44
-
32
33
34
35
36
37
DAC1
DAC2
AVSS
DAC3
DAC4
DVSS
OP
OP
PWR
OP
OP
PWR
45
38
VDEC
PWR
46
47
48
49
50
51
39
40
41
42
43
-
XTAL/CLK
XTALN
DVDD
CDATA
RDATA
-
IP
OP
PWR
IP
C-BUS Reply Data: A 3-state C-BUS serial data output to the
TS OP µC. This output is high impedance when not sending data to
the µC.
NC
Reserved – do not connect this pin
2014 CML Microsystems Plc
Page 9
D/7141_FI-3.x/6