Digital PMR Radio Processor
CMX7131/CMX7141
2
Block Diagram
Tx and Rx Interfacing
DISC
MOD1
MOD2
VBIAS
VBIAS
VBIAS
Tx
Mode
Select
ALT
MIC
MUX
MUX
Tx Modulator
Audio O/P
AUDIO
Rx Signal Routing
Core Operations
4FSK Modem
Demodulator
4FSK Modem
Modulator
Filtering
Filtering
Soft-decision
Decoding
Rx Data
Buffer
Tx Data
Buffer
AFSD
Air Interface Protocol
Air Interface Protocol
Rx Functions
Tx Functions
Auxiliary Functions
TXENA
RXENA
GPIOA
GPIOB
Function Image™
Configured IO
SYSCLK1
SYSCLK2
System Clock 1
System Clock 2
GPIO
System Clocks
Internal Signal
RF1N
Thresholds
Averaging
Thresholds
Averaging
RF1P
Aux
ADC1
RF Synthesiser 1
ADC1
ADC2
ADC3
ADC4
CP1OUT
ISET1
MUX
Aux
ADC 2
RF2N
RF2P
Multiplexed ADCs
RF Synthesiser 2
CP2OUT
ISET2
DAC1
DAC2
AuxDAC1
AuxDAC2
AuxDAC3
AuxDAC4
Ramp Profile RAM
RFVDD
CPVDD
DAC3
DAC4
RFVSS
RFCLK
RF Synthesisers
(CMX7131 only)
DACs
System Control
IRQN
RDATA
CSN
EPSI
EPSCLK
EPSO
SPI
EEPROM
Interface
C-BUS
Interface
Main PLL
Power
Control
Registers
CDATA
SCLK
EPSCSN
SSOUT
Boot
Control
Crystal
Bias
Bias
Oscillator
Figure 1 CMX7141 Block Diagram
2014 CML Microsystems Plc
Page 7
D/7141_FI-3.x/6