AIS Baseband IC with/without RF Synthesiser
CMX7032/CMX7042
DC Parameters
Notes
Min.
Typ.
Max.
Unit
C-BUS Interface and Logic Outputs
Output Logic 1, (I = 120µA)
90%
80%
–
–
–
1.0
1.0
–
–
–
–
–
–
–
–
–
10%
15%
10
+1.0
+1.0
DV
DV
DV
DV
µA
µA
OH
DD
DD
DD
DD
Output Logic 1, (I = 1mA)
OH
Output Logic 0, (I = 360µA)
OL
Output Logic 0, (I = -1.5mA)
OL
“Off” State Leakage Current
IRQN
(Vout = DV
)
DD
RDATA (output HiZ)
µA
26
V
BIAS
–
22
+2%
–
AV
DD
k
Output voltage offset wrt AV /2 (I < 1A)
2%
–
DD
OL
Output impedance
AC Parameters
CLK Input
Notes
Min.
Typ.
Max.
Unit
'High' pulse width
'Low' pulse width
31
31
19
19
–
–
–
–
ns
ns
Input impedance (at 19.2MHz)
Powered-up
Resistance
Capacitance
Resistance
Capacitance
–
–
–
–
-
150
20
300
20
19.2
–
–
–
–
–
–
k
pF
k
pF
MHz
ppm
ms
Powered-down
Clock frequency
Clock stability/accuracy
Clock start up (from powersave)
–
–
±20
–
20
V
BIAS
Start up time (from powersave)
–
30
–
ms
RxIN, Spare Input
Input impedance
Input signal range
Input signal envelope
Load resistance (feedback pins)
Amplifier open loop voltage gain
(I/P = 1mV rms at 100Hz)
Unity gain bandwidth
34
35
–
–
0.3
80
> 10
–
–
10 to 90
2.2
M
DD
Vp-p
%AV
–
–
k
–
–
80
1.0
–
–
dB
MHz
36
37
Programmable Input Gain Stage
Gain (at 0dB)
Cumulative gain error
0
0
+0.5
+1.0
100
dB
dB
µs
dB
0.5
1.0
–
(wrt attenuation at 0dB)
Modulator Outputs (MOD 1, MOD 2)
Power-up to output stable
Modulator Attenuators
Attenuation (at 0dB)
37
41
43
50
0
+1.0
1.0
Cumulative attenuation error
(wrt attenuation at 0dB)
Output impedance
0
600
500
–
–
–
+0.6
–
–
dB
k
µA
V
0.6
–
–
125
0.5
20
42
42
Enabled
Disabled
Output current range (AV = 3.3V)
+125
DD
Output voltage range
Load resistance
44
51
AV –0.5
DD
–
k
ADC 1 to 4 Inputs
Source output impedance
–
–
24
k
2012 CML Microsystems Plc
53
D/7032/42_FI1.2/13
CMLMICRO [ CML MICROCIRCUITS ]
