欢迎访问ic37.com |
会员登录 免费注册
发布采购

CMX7042Q3 参数 Datasheet PDF下载

CMX7042Q3图片预览
型号: CMX7042Q3
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, VQFN-48]
分类和应用: 电信电信集成电路
文件页数/大小: 61 页 / 3203 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX7042Q3的Datasheet PDF文件第48页浏览型号CMX7042Q3的Datasheet PDF文件第49页浏览型号CMX7042Q3的Datasheet PDF文件第50页浏览型号CMX7042Q3的Datasheet PDF文件第51页浏览型号CMX7042Q3的Datasheet PDF文件第53页浏览型号CMX7042Q3的Datasheet PDF文件第54页浏览型号CMX7042Q3的Datasheet PDF文件第55页浏览型号CMX7042Q3的Datasheet PDF文件第56页  
AIS Baseband IC with/without RF Synthesiser  
CMX7032/CMX7042  
8.1.3 Operating Characteristics  
For the following conditions unless otherwise specified:  
External components as recommended in Figure 2.  
Maximum load on digital outputs = 30pF.  
Clock Frequency = 19.2MHz (20ppm); Tamb = 40°C to +85°C.  
AV = DV = CPV = 3.0V to 3.6V; RFV = 2.25V to 2.75V.  
DD  
DD  
DD  
DD  
Reference signal level = 300mV pk-pk with AV = 3.3V.  
DD  
Signal levels track with supply voltage, so scale accordingly.  
Signal to Noise Ratio (SNR) in bit rate bandwidth.  
Input stage gain = 0dB. Output stage attenuation = 0dB.  
DC Parameters  
Supply Current  
Notes  
21  
Min.  
Typ.  
Max.  
Unit  
All Powersaved (Deep Sleep mode)  
DI (DV = 3.3V, V = 2.5V)  
8
4
4
100  
20  
20  
µA  
µA  
µA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
RFI (CPV = 3.3V, RFV = 2.5V)  
DD  
DD  
DD  
22  
22  
22  
23  
Rx Mode  
DI (DV = 3.3V, V = 2.5V)  
14.4  
5.8  
mA  
mA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
Rx Mode (Sleep Enabled)  
DI (DV = 3.3V, V  
= 2.5V)  
= 2.5V)  
10  
1.8  
mA  
mA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
Tx Mode  
DI (DV = 3.3V, V  
20  
11  
mA  
mA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
Additional current for RF Synthesiser  
DI (DV = 3.3V, V = 2.5V)  
0
0
2.5  
4.5  
mA  
mA  
mA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
RFI (CPV = 3.3V, RFV = 2.5V)  
DD  
DD  
DD  
Additional current for Auxiliary  
System Clock (output running at 4MHz)  
DI (DV = 3.3V, V = 2.5V)  
250  
300  
µA  
µA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
Additional current for Auxiliary ADC  
DI (DV = 3.3V, V = 2.5V)  
50  
1
µA  
µA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
Additional current for each Auxiliary DAC  
DI (DV = 3.3V, V = 2.5V)  
0
200  
mA  
µA  
DD  
DD  
DEC  
AI (AV = 3.3V)  
DD  
DD  
25  
CLK  
Input Logic 1  
Input Logic 0  
Input current (Vin = DV  
Input current (Vin = DV  
70%  
30%  
40  
DV  
DV  
µA  
µA  
DD  
DD  
)
)
DD  
40  
SS  
C-BUS Interface and Logic Inputs  
Input Logic 1  
70%  
1.0  
DV  
DD  
Input Logic 0  
Input Leakage Current (Logic 1 or 0)  
Input Capacitance  
30%  
1.0  
7.5  
DV  
DD  
µA  
pF  
2012 CML Microsystems Plc  
52  
D/7032/42_FI1.2/13  
 复制成功!