AIS Baseband IC with/without RF Synthesiser
CMX7032/CMX7042
Figure 12 Rx Task Operation..................................................................................................................... 30
Figure 13 Typical AIS Transmission .......................................................................................................... 37
Figure 14 Tx Spectrum Masks................................................................................................................... 38
Figure 15 DSC Format............................................................................................................................... 41
Figure 16 Example RF Synthesiser Components...................................................................................... 44
Figure 17 Single RF PLL Block Diagram ................................................................................................... 45
Figure 18 System Clock Generation .......................................................................................................... 47
Figure 19 C-BUS Timing............................................................................................................................ 57
Figure 20 SPI Interface Timing .................................................................................................................. 58
Figure 21 Mechanical Outline for 64-pad VQFN Package (Q1)................................................................. 59
Figure 22 Mechanical Outline for 64-pin LQFP (leaded) Package (L9) ..................................................... 59
Figure 23 Mechanical Outline for 48-pad VQFN Package (Q3)................................................................. 60
Figure 24 Mechanical Outline for 48-pin LQFP (leaded) Package (L4) ..................................................... 60
It is always recommended that you check for the latest product datasheet version from the
Datasheets page of the CML website: [www.cmlmicro.com].
1.1 History
Version Changes
Date
13
21/11/12
Section 7.6.5 rewritten to correct transmit timing control description
New Figure 13 showing typical AIS transmission
Section 9.19, modem task table, Tx AIS unscheduled – TDB - bit 5 corrected.
Section 9.19, sub-paragraph levels restructured to improve clarity
Minor style changes and correction of typographical errors
Add CRC disable feature.
Add CS-Sync output.
Add SlotCLK output.
12
11
07/10/11
29/7/11
Changed EEPROM references to serial memory
Update to RF Synthesiser paramaters, following evaluation.
Correction of errors in $C8 Command Register Table.
Further Information on Status2 ($C5) Register.
Clarification of BOOTEN options by Table 13 and Table 3.
Correction of error in Figure 8.
Update to Modulation Notes (section 11.1) and clarification of Figure 26.
Addition of operating voltage range clarification (3.0V to 3.6V) into History files
Addition of revised Function Image™ flowcharts (Fig 7 and 8) into History files
Correction to HCT in Task table: should be $2E not $0E
HCT $A7 settings removed from Modem Task table. This information is present
in the table immediately below.
10
9
18/9/09
11/9/09
Addition of update to register $CE b8 description into History files
Remove ac coupling from component diagrams - should always be dc coupled
Clarification of the power-up and reset conditions
Addition of a hyperlinked table in section 10, in place of C-BUS Register Map
Minor style changes and correction of typographical errors
2012 CML Microsystems Plc
5
D/7032/42_FI1.2/13
CMLMICRO [ CML MICROCIRCUITS ]
