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CMX7031L9 参数 Datasheet PDF下载

CMX7031L9图片预览
型号: CMX7031L9
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, PQFP64, LQFP-64]
分类和应用: 电信电信集成电路
文件页数/大小: 50 页 / 3145 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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AX.25 Modem  
CMX7031/CMX7041  
CMX7031 CMX7041  
Signal  
Name  
Type  
64-pin  
Q1/L9  
48-pin  
Q3/L4  
Description  
52  
53  
54  
55  
45  
-
DVSS  
-
PWR Digital Ground.  
NC  
IP  
Reserved do not connect this pin.  
46  
47  
SCLK  
SYSCLK 2  
C-BUS: The C-BUS serial clock input from the µC.  
Synthesised Digital System Clock Output 2.  
OP  
C-BUS: The C-BUS chip select input from the µC - there is  
no internal pull-up on this input.  
48  
CSN  
IP  
56  
57  
58  
59  
60  
61  
-
-
NC  
OP  
OP  
Reserved do not connect this pin.  
1
2
3
4
EPSI  
Serial Memory Serial Interface: SPI bus output.  
Serial Memory Serial Interface: SPI bus clock.  
EPSCLK  
EPSO  
IP+PD Serial Memory Serial Interface: SPI bus input.  
EPSCSN  
OP  
Serial Memory Serial Interface: SPI bus Chip Select.  
Used in conjunction with BOOTEN2 to determine the  
operation of the bootstrap program.  
62  
5
BOOTEN1  
IP+PD  
Used in conjunction with BOOTEN1 to determine the  
operation of the bootstrap program.  
63  
64  
6
7
BOOTEN2  
DVSS  
IP+PD  
PWR Digital Ground.  
On this device, the central metal pad (which is exposed on  
Q1 and Q3 packages only) may be electrically unconnected  
or, alternatively, may be connected to Analogue Ground  
(AVss).  
EXPOSED  
EXPOSED  
SUBSTRATE  
~
METAL PAD METAL PAD  
No other electrical connection is permitted.  
Notes: IP  
OP  
=
=
=
=
=
=
Input (+ PU/PD = internal pull-up/pull-down resistor)  
Output  
Bidirectional  
3-state Output  
Power Connection  
No Connection - should NOT be connected to any signal.  
BI  
TS OP  
PWR  
NC  
3.1  
Signal Definitions  
Table 1 Definition of Power Supply and Reference Voltages  
Signal Name  
Pins  
AVDD  
DVDD  
RFVDD  
CPVDD  
VDEC  
VBIAS  
AVSS  
Usage  
Power supply for analogue circuits.  
Power supply for digital circuits.  
Power supply for RF synthesiser circuits.  
Power supply for RF charge pump.  
Power supply for core logic, derived from DV by on-chip regulator.  
Internal analogue reference level, derived from AV  
Ground for all analogue circuits.  
Ground for all digital circuits.  
AV  
DV  
DD  
DD  
RFV  
CPV  
DD  
DD  
V
DEC  
DD  
V
BIAS  
.
DD  
AV  
DV  
SS  
SS  
DVSS  
RFVSS  
RFV  
Ground for all RF circuits.  
SS  
2013 CML Microsystems Plc  
Page 9  
D/7031/7041_FI-4.x/5