AX.25 Modem
CMX7031/CMX7041
CMX7031 CMX7041
Signal
Name
Type
64-pin
Q1/L9
48-pin
Q3/L4
Description
Channel 2 inverting input.
18
19
20
21
22
23
24
ALTN
ALTFB
MICFB
MICN
IP
OP
OP
IP
26
27
28
29
30
31
32
Channel 2 input amplifier feedback.
Channel 3 input amplifier feedback.
Channel 3 inverting input.
AVSS
MOD1
MOD2
PWR Analogue Ground.
OP
OP
Modulator 1 output.
Modulator 2 output.
Internally generated bias voltage of about AVDD/2, except
when the device is in ‘Powersave’ mode when VBIAS will
discharge to AVSS. Must be decoupled to AVSS by a capacitor
mounted close to the device pins. No other connections
allowed.
25
VBIAS
OP
33
26
27
28
29
30
MONITOR
ADC1
OP
IP
Rx Monitor/Rx Eye output
34
35
36
37
38
Auxiliary ADC input (1)
Auxiliary ADC input (2)
Auxiliary ADC input (3)
Auxiliary ADC input (4)
Each of the two ADC blocks
can select its input signal
from any one of these input
pins, or from the MIC, ALT or
DISC input pins. See section
9.1.3 for details
ADC2
IP
ADC3
IP
ADC4
IP
Positive 3.3V supply rail for the analogue on-chip circuits.
Levels and thresholds within the device are proportional to
this voltage. This pin should be decoupled to AVSS by
capacitors mounted close to the device pins.
39
31
AVDD
PWR
40
41
42
43
44
-
32
33
34
35
36
37
DAC1
DAC2
AVSS
DAC3
DAC4
DVSS
OP
OP
Auxiliary DAC output 1/RAMDAC.
Auxiliary DAC output 2.
PWR Analogue Ground.
OP
OP
Auxiliary DAC output 3.
Auxiliary DAC output 4.
PWR Digital Ground.
Internally generated 2.5V supply voltage. Must be decoupled
to DVSS by capacitors mounted close to the device pins. No
other connections allowed, except for the optional connection
45
38
VDEC
PWR
to RFVDD
.
Input to the oscillator inverter from the Xtal circuit or external
clock source.
46
47
39
40
XTAL/CLOCK
XTALN
IP
OP
The output of the on-chip Xtal oscillator inverter.
The 3.3V positive supply rail for the digital on-chip circuits.
48
41
DVDD
PWR This pin should be decoupled to DVss by capacitors
mounted close to the device pins.
42
43
44
CDATA
RDATA
-
IP
TS OP
NC
C-BUS: Serial data input from the µC.
49
50
51
C-BUS: A 3-state C-BUS serial data output to the µC. This
output is high impedance when not sending data to the µC.
Reserved – do not connect this pin.
2013 CML Microsystems Plc
Page 8
D/7031/7041_FI-4.x/5
CMLMICRO [ CML MICROCIRCUITS ]
