AX.25 Modem
CMX7031/CMX7041
6
General Description
The CMX7031/CMX7041 (7031/7041FI-4.x) are intended for use in half-duplex digital radio equipment and
are particularly suited to Amateur Packet Radio using 1200bps or 9600bps data rates and the AX.25
protocol. When both modem speeds are enabled in Rx, the device will automatically decide on which
demodulator to activate depending on the reception of a valid sync sequence. For maximal flexibility and
compatibility with existing equipment, both modems can detect a $0000007E or $7E7E7E7E sync
sequence (32 bits in AFSK and 24 bits in GMSK are required to minimise the effect of “false” detects in the
presence of noise). The data is NRZId before being presented to the host over the RxData registers. In Tx
mode, the host can decide which mode, 1200bps, 9600bps or DTMF to use. Data is NRZId before
transmission. In 9600bps mode the K9NG scrambler is automatically implemented on both Rx and Tx
data. Tx Pre-emphasis is included for both 9600bps and 1200bps modes.
A flexible power control facility allows the device to be placed in its optimum powersave mode when not
actively processing signals. The CMX7031/CMX7041 include a crystal clock generator, with buffered
output, to provide a common system clock if required. A block diagram of the CMX7031/CMX7041 is
shown in Figure 1.
The signal processing blocks can be individually routed from any of the three mic/audio/discriminator input
pins.
Tx functions:
o
o
o
o
o
o
o
o
o
Two-point modulation outputs with programmable level adjustment
Programmable DTMF generator
1200bps AFSK modem
9600bps GMSK modem
NRZI encoding
Tx Pre-emphasis
K9NG scrambling for 9600bps mode
Tx Sequencer
Tx Enable output
Rx functions:
o
o
o
o
o
o
o
o
Demodulator input with input amplifier and programmable gain adjustment
1200bps AFSK modem
9600bps GMSK modem
NRZI decoding
K9NG descrambling for 9600bps mode
Automatic 1200/9600bps detection
Multiple sync detection
Rx Enable output
Auxiliary functions:
o
o
o
o
Two flexible Integer-N RF synthesisers (CMX7031 only)
Two programmable system clock outputs
Two auxiliary ADCs with selectable input paths
Four auxiliary DACs, one with built-in programmable RAMDAC
Interface:
o
o
o
o
o
C-BUS, 4-wire, high-speed, synchronous serial command/data bus
Open drain IRQ to host
Two GPIO pins
Serial Memory boot mode
C-BUS boot mode
2013 CML Microsystems Plc
Page 15
D/7031/7041_FI-4.x/5
CMLMICRO [ CML MICROCIRCUITS ]
