Dual SPM/Security Detector/Generator
CMX641A
Package
D2
Pin No.
9
Package
P4
Pin No.
9
Signal
Description
Name
CH1 AMP OUT
Type
O/P
The output of the Channel 1 input amplifier.
See Figures 2 and 3.
The negative input to the Channel 1 input
amplifier. See Figures 2 and 3.
The positive input to the Channel 1 Input
amplifier. See Figures 2 and 3.
The negative supply rail (ground).
This pin selects the device application. When
(logic ‘0’) the CMX641A is in Fixed Bandwidth
Operating state. When (logic ‘1’) it is in
Enhanced Features Operating state.
This pin has an internal pulldown resistor on-
chip so that when unconnected, the default state
is Fixed Bandwidth Operating state.
10
10
CH1 AMP IN (-)
I/P
11
12
13
11
12
13
CH1 AMP IN
(+)
V
SS
ENHANCED
FEATURES
I/P
POWER
I/P
14
15
16
14
15
16
CH2 AMP IN
(+)
CH2 AMP IN (-)
CH2 AMP OUT
I/P
I/P
O/P
The positive input to the Channel 2 input
amplifier. See Figures 2 and 3.
The negative input to the Channel 2 input
amplifier. See Figures 2 and 3.
The output of the Channel 2 input amplifier.
See Figures 2 and 3.
A logic input to set the Channel 1 and Channel 2
output format. When high (logic ‘1’), the outputs
are in the Tone Follower mode; when low (logic
‘0’), the outputs are in Packet mode.
17
17
OP SELECT
I/P
©
2002 Consumer Microcircuits Limited
5
D/641A/5
CMLMICRO [ CML MICROCIRCUITS ]
