欢迎访问ic37.com |
会员登录 免费注册
发布采购

CMX608 参数 Datasheet PDF下载

CMX608图片预览
型号: CMX608
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated Input and Output Channel Filters]
分类和应用:
文件页数/大小: 70 页 / 3411 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX608的Datasheet PDF文件第46页浏览型号CMX608的Datasheet PDF文件第47页浏览型号CMX608的Datasheet PDF文件第48页浏览型号CMX608的Datasheet PDF文件第49页浏览型号CMX608的Datasheet PDF文件第51页浏览型号CMX608的Datasheet PDF文件第52页浏览型号CMX608的Datasheet PDF文件第53页浏览型号CMX608的Datasheet PDF文件第54页  
RALCWI Vocoder  
CMX608/CMX618/CMX638  
Bit 15 If this bit is clear, the low watermark will be set from the supplied watermark value.  
H
In addition, the device will be set to notify as soon as the low watermark condition exists  
(which may be immediately, depending on the sample count).  
If this bit is set, the high watermark will be set from the supplied watermark value. In  
addition, the device will be set to wait until the high watermark condition exists (which may  
be immediately, depending on the sample count) before allowing the low watermark  
condition to be signalled.  
IRQENAB register address $1F  
15  
RDY  
14  
SVC  
13  
0
12  
0
11  
0
10  
0
9
0
8
VDW  
7
0
6
PLV  
5
0
4
0
3
0
2
1
0
VDA  
DFDA  
EFDA  
This write-only register specifies which of the bits in the STATUS register ($40) will cause a C-BUS  
interrupt to be generated (IRQN pin is pulled low).  
Setting a bit to '1' will cause the corresponding status bit to generate a C-BUS interrupt when the  
status bit is set to '1'. Please refer to the STATUS register ($40) for an explanation of the bits.  
The default state of this register after a power-up reset is for all bits, except for bit 15 (RDY), to be  
cleared to '0'. Bit 15 is set to '1', so that when the device is ready to accept commands (signified  
by bit 15 (RDY) of the STATUS register ($40) being set to '1'), there will also be a C-BUS interrupt.  
2014 CML Microsystems Plc  
50  
D/608_18_38/11  
 复制成功!