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CMX608 参数 Datasheet PDF下载

CMX608图片预览
型号: CMX608
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated Input and Output Channel Filters]
分类和应用:
文件页数/大小: 70 页 / 3411 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RALCWI Vocoder  
CMX608/CMX618/CMX638  
CLOCK register address $1D  
15 14 13 12 11  
10  
9
8
7
6
5
4
3
2
1
0
Clock Value  
This write only register, together with the DTMFATTEN register ($0A), controls the speed of the  
Vocoder's internal processor. This register has no default value and therefore must be set up after  
the device is reset. Two speeds can be selected: slow and fast.  
Writing $0005 to this register, followed by a write to the DTMFATTEN register, will select the slow  
speed. This is the speed at which the internal processor starts up and is suitable for use with  
CMX608, CMX618 and CMX638 (only when operated in a half-duplex mode). The fast speed may  
also be selected: this will reduce the latency by approximately 3ms but will increase the current  
consumption.  
Writing $0006 to this register, followed by a write to the DTMFATTEN register, will select the fast  
speed. This is the speed which must be selected when operating the CMX638 as a full-duplex  
Vocoder.  
After writing to the DTMFATTEN register, the host must wait until bit 14 (SVC) of the STATUS  
register ($40) is set to '1' before writing to any more C-BUS registers. Please refer to the  
DTMFATTEN register description.  
To ensure correct device operation, no other values should be written to this register. The function  
of this register should not be confused with 'clock throttling', which is controlled by the THROTTLE  
bit (b4) in the POWERSAVE register ($09). Please note that 'clock throttling' is not available in the  
CMX638 when used in full-duplex mode.  
VDWHLWM register address $1E  
15  
H
14  
0
13  
0
12  
0
11  
0
10  
9
8
7
6
5
4
3
2
1
0
Watermark  
This write-only register controls the behaviour of the Vocoder-Data-Wanted (VDW) notification by  
setting either the high, or low, watermark values. After this register has been written, the host  
should wait until bit 15 (RDY) is set in the STATUS register ($40). If interrupts are enabled for this  
bit, IRQN will also go low. No other C-BUS registers should be read or written whilst this  
command is in progress.  
The device has an audio sample buffer which feeds the digital to analogue converter. Each time a  
Vocoder frame is supplied to the device, the complete frame is decoded and the resultant audio  
samples are placed in this buffer. The buffer is large enough to accommodate up to 800 samples.  
This is the equivalent of 5 x 20ms Vocoder frames.  
The device will notify the host that Vocoder data is wanted when the number of samples in the  
sample buffer is less than the low watermark value by setting bit 8 (VDW) in the STATUS register  
($40). If interrupts are enabled for this bit, IRQN will also go low. Once notified, no other  
notification will occur until the number of samples in the sample buffer is greater than or equal to  
the high watermark.  
If notification of Vocoder-Data-Wanted is required, these two watermark values must be explicitly  
set after a device reset. There are no defaults for these values. See also section 6.7.  
Bits 0 to 10  
Watermark  
This value sets the number of samples for either low or high watermark.  
Bits 11 to 14 These bits are reserved and should be cleared to '0' for correct device operation.  
2014 CML Microsystems Plc  
49  
D/608_18_38/11  
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