Audio Scrambler and Sub-Audio Signalling Processor
CMX138A
CONTENTS
Section
Page
1
2
3
4
Brief Description.....................................................................................................................1
History .....................................................................................................................................5
Block Diagram ........................................................................................................................6
Signal List................................................................................................................................7
4.1
External Components ............................................................................................................9
5.1 PCB Layout Guidelines and Power Supply Decoupling............................................11
Signal Definitions.........................................................................................................8
5
6
7
General Description .............................................................................................................12
Detailed Descriptions...........................................................................................................13
7.1
7.2
Xtal Frequency ..........................................................................................................13
Host Interface ............................................................................................................13
7.2.1 C-BUS Operation.................................................................................................13
Device Control...........................................................................................................15
7.3.1 Signal Routing .....................................................................................................15
7.3.2 Mode Control.......................................................................................................16
Audio Functions.........................................................................................................17
7.4.1 Audio Receive Mode ...........................................................................................17
7.4.2 Audio Transmit Mode ..........................................................................................19
7.4.3 Audio Compandor................................................................................................23
Sub-audio Signalling..................................................................................................25
7.5.1 Receiving and Decoding CTCSS Tones .............................................................27
7.5.2 Receiving and Decoding DCS Codes .................................................................28
7.5.3 Transmit CTCSS Tone ........................................................................................30
7.5.4 Transmit DCS Code ............................................................................................30
In-band Signalling – User Tones...............................................................................30
7.6.1 Receiving and Decoding In-band Tone...............................................................30
7.6.2 Transmitting In-band Tone ..................................................................................31
Auxiliary ADC Operation ...........................................................................................31
Auxiliary DAC/RAMDAC Operation...........................................................................32
Digital System Clock Generator ................................................................................33
7.9.1 Main Clock Operation..........................................................................................33
7.9.2 System Clock Operation......................................................................................33
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
GPIO..........................................................................................................................34
Signal Level Optimisation..........................................................................................34
7.11.1 Transmit Path Levels ..........................................................................................34
7.11.2 Receive Path Levels ...........................................................................................34
8
9
C-BUS Register Summary ...................................................................................................35
8.1.1 Interrupt Operation ..............................................................................................36
8.1.2 General Notes .....................................................................................................36
Configuration Guide.............................................................................................................37
© 2010 CML Microsystems Plc
Page 2
D/138A/2
CMLMICRO [ CML MICROCIRCUITS ]
