Audio Scrambler and Sub-Audio Signalling Processor
CMX138A
CMX138A
27
28
Signal
Name
CLKSEL
RXENA
Type
Description
IP+PU Clock speed select (hi = 6.144MHz, lo = 3.6864MHz).
OP
Digital output pin – RxENA (active lo).
Notes:
IP
OP
BI
TS OP
PWR
NC
=
=
=
=
=
=
Input (+ PU/PD = internal pullup/pulldown resistor)
Output
Bidirectional
3-state Output
Power Connection
No Connection - should NOT be connected to any signal.
4.1
Signal Definitions
Table 1 Definition of Power Supply and Reference Voltages
Signal
Name
AV
DD
DV
DD
V
DEC
V
BIAS
AV
SS
DV
SS
Pins
AVDD
DVDD
VDEC
VBIAS
AVSS
DVSS
Usage
Power supply for analogue circuits
Power supply for digital circuits
Power supply for core logic, derived from DV
DD
by on-chip regulator
Internal analogue reference level, derived from AV
DD
Ground for all analogue circuits
Ground for all digital circuits
©
2010 CML Microsystems Plc
Page 8
D/138A/2
CMLMICRO [ CML MICROCIRCUITS ]
